Diodes Incorporated 74AUP1G06FW5-7

Overview

74AUP1G06FW5-7 from Diodes Incorporated is a single CMOS inverter with open-drain output, designed for ultra-low-power portable systems operating from 0.8V to 3.6V. It features ±4mA output drive at 3.0V, <0.9µA static supply current, and IOFF circuitry enabling safe partial power-down operation. Used in battery-powered consumer electronics for level-shifting and wired-AND logic.

For engineers reviewing the 74AUP1G06FW5-7 datasheet, 74AUP1G06FW5-7 pinout, 74AUP1G06FW5-7 application, or 74AUP1G06FW5-7 equivalent, key selection criteria include open-drain compatibility with I²C buses, sub-1µA quiescent current across voltage range, Schmitt-trigger input hysteresis (250mV typ. at 3.0V), and DFN1010-6 package thermal resistance of 435°C/W.

Technical Context

This device implements a single inverting logic gate with open-drain output topology, requiring an external pull-up resistor for high-level assertion. Its IOFF circuit actively disables output leakage during power-down, preventing backflow currents when VCC = 0V while inputs remain biased.

The input stage incorporates Schmitt-trigger action with 250mV typical hysteresis at VCC = 3.0V, enabling robust operation with slow-rising/falling signals. Propagation delay ranges from 0.8ns (min, 3.3V, CL = 5pF) to 11.9ns (max, 3.3V, CL = 30pF) across industrial temperature range.

Key Specifications

Pinout & Package

X1-DFN1010-6 package: 1.0mm × 1.0mm × 0.5mm body, 0.35mm pad pitch, six-terminal leadless construction with exposed thermal pad (not electrically connected). Compliant with JEDEC MO-252.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter-with-open-drain applications.

Compared with SN74LVC1G06DBVR and 74LVC1G06GW,125, the 74AUP1G06FW5-7 uniquely combines sub-1V operation, IOFF, Schmitt input down to 0.8V, and <1µA ICC-making it the sole choice for battery-critical, multi-rail portable systems requiring guaranteed power-down isolation and noise-immune sensing.

Availability

74AUP1G06FW5-7 is available at Aetrix Electronics and suitable for mobile device power sequencing, I²C bus level translation, USB-C port detection logic, and low-power sensor interface applications requiring stable component supply and long-term lifecycle support.

Supply support for 74AUP1G06FW5-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and mixed-signal solutions for power management, signal integrity, and connectivity applications.

The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-1µA static current and extended battery life while maintaining full functionality across 0.8V–3.6V supply rails.

FAQ

Can 74AUP1G06FW5-7 operate reliably at 0.85V supply?

Yes. The device is fully characterized from 0.8V to 3.6V, with guaranteed propagation delay (≤12ns at 0.85V, CL=15pF) and input thresholds defined down to 0.8V. All DC parameters-including VIH/VIL, VOL, and IOFF-are specified across this range per DS35148 Rev. 5–2.

What is the maximum recommended pull-up resistor value for Y output?

For 3.3V systems with 400kHz I²C, a 10kΩ pull-up is typical. At 3.0V, the device sinks 4mA minimum, supporting ≤750Ω for 3V logic-high margin. For 1.2V operation, 2.2kΩ maintains rise time <300ns with 10pF bus capacitance, verified in switching characteristics tables.

Does NC pin (Pin 3) require PCB connection?

No. Pin 3 is internally unconnected and must remain floating or be tied to GND solely for mechanical stability-not electrical function. Diodes Incorporated's AP02002 pad layout shows it as non-soldered; connecting to VCC or signal nets risks parasitic coupling or ESD path disruption.

How does IOFF behave when VCC = 0V but input A = 3.3V?

IOFF actively disables the output transistor, limiting leakage to ±0.5µA max (–40°C to +85°C). This prevents current flow from the 3.3V input into the grounded VCC rail, satisfying JEDEC JESD78 latch-up immunity requirements and protecting powered-down domains.