Diodes Incorporated 74AUP1G06FZ4-7

Overview

74AUP1G06FZ4-7 from Diodes Incorporated is a single CMOS inverter with open-drain output, designed for ultra-low-power portable systems operating from 0.8V to 3.6V. It features ±4mA output drive at 3.0V, <0.9µA static supply current, and IOFF partial power-down protection. Used in battery-powered consumer electronics for level-shifting and wired-OR logic.

For engineers reviewing the 74AUP1G06FZ4-7 datasheet, 74AUP1G06FZ4-7 pinout, 74AUP1G06FZ4-7 application, or 74AUP1G06FZ4-7 equivalent, key selection criteria include open-drain compatibility, sub-1µA ICC performance across 0.8–3.6V operation, Schmitt-trigger input hysteresis (250mV typ. at 3.0V), and IOFF-enabled system power sequencing.

Technical Context

This device implements a single inverting logic function with an open-drain output stage, requiring an external pull-up resistor for high-level assertion. Its IOFF circuit actively disables output leakage when VCC = 0V, enabling safe back-drive prevention during partial power-down states.

The input incorporates Schmitt-trigger action with ~250mV hysteresis at VCC = 3.0V, allowing robust operation with slow-rising/falling signals. Propagation delay ranges from 0.8ns (min, 3.3V, CL = 5pF) to 21.3ns (max, 1.2V, CL = 30pF), scaling predictably with voltage and load capacitance.

Key Specifications

Pinout & Package

X2-DFN1410-6 package: 1.4mm × 1.0mm × 0.4mm body, 0.5mm pad pitch, wettable flank side walls for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter-with-open-drain-output applications.

Compared with SN74LVC1G06DBVR and 74LVC1G14GW,125, the 74AUP1G06FZ4-7 uniquely combines ultra-low ICC, IOFF, Schmitt input, and open-drain output-making it optimal for battery-constrained, multi-rail, noise-prone embedded interfaces where all four attributes are simultaneously required.

Availability

74AUP1G06FZ4-7 is available at Aetrix Electronics and suitable for mobile device power sequencing, IoT sensor interface, wired-OR interrupt aggregation, and I²C-level translation requiring stable component supply and long-term lifecycle assurance.

Supply support for 74AUP1G06FZ4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, low-power, and small-signal solutions for consumer, industrial, and computing markets.

The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-1µA static current and wide-VCC operation to extend battery life in space-constrained devices like wearables and handhelds.

FAQ

What is the maximum capacitive load this device can drive while maintaining specified propagation delay?

The datasheet specifies switching characteristics up to CL = 30pF across all VCC and temperature ranges. At 3.3V and +25°C, tPD remains ≤4.6ns (max) under 30pF load. Driving >30pF increases delay nonlinearly and may violate setup/hold timing in high-speed interfaces; external buffering is recommended beyond this limit.

Can the open-drain output be used without an external pull-up resistor?

No. The open-drain output cannot assert a logic HIGH state without an external pull-up resistor. Leaving Y unconnected results in undefined voltage and potential EMI. Pull-up values from 1kΩ (for speed) to 100kΩ (for ultra-low current) are supported, depending on rise-time and bus capacitance requirements.

How does the IOFF feature behave when VCC is at 0V but input voltage is present?

When VCC = 0V, the IOFF circuit disables the output FET regardless of input voltage, limiting leakage to ±0.2µA (max). This prevents current from flowing backward through the input into the powered-down VCC rail-a critical safeguard during hot-plug or partial-power-down sequences.

Is the NC pin electrically isolated or should it be grounded for thermal or EMI reasons?

Pin 4 (NC) and Pin 6 (NC) are internally unconnected; no silicon circuitry links them to any node. They may be left floating, grounded, or connected to VCC per PCB design rules-none affects functionality. Grounding improves thermal dissipation marginally but is not required for electrical performance.