Nexperia USA Inc. 74AUP1G06GM,132

Overview

74AUP1G06GM,132 from Nexperia is a single low-power CMOS inverter with open-drain output and Schmitt-trigger input, operating across 0.8 V to 3.6 V supply. It delivers ICC ≤ 0.9 μA (max) at 25 °C, supports partial power-down via IOFF circuitry, and is rated for −40 °C to +125 °C. Used in level-shifting I²C bus interfaces and noise-immune sensor signal conditioning.

For engineers reviewing the 74AUP1G06GM,132 datasheet, 74AUP1G06GM,132 pinout, 74AUP1G06GM,132 application, or 74AUP1G06GM,132 equivalent, this device serves as a robust, ultra-low-power logic inverter where rail-to-rail compatibility, backflow current prevention during power sequencing, and sub-1 ns propagation delay at 3.3 V are critical selection criteria.

Technical Context

The 74AUP1G06GM implements a single-stage inverting buffer with Schmitt-trigger hysteresis on the A input, enabling tolerance to slow-rising signals and reducing susceptibility to noise-induced switching. Its open-drain Y output requires an external pull-up and supports wired-AND configurations.

IOFF circuitry actively disables both output and input paths when VCC = 0 V, limiting backflow current to ±0.75 μA and ensuring safe operation during hot insertion or partial system power-down. Input overvoltage tolerance up to 3.6 V allows interfacing with higher-voltage domains without clamping diodes.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; wettable flanks not present; thermal pad absent.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverter applications.

Compared with SN74LVC1G06DBVR and 74LVC1G14GW,125, the 74AUP1G06GM,132 uniquely combines ultra-low ICC, IOFF, Schmitt input, and open-drain output - making it the only option for battery-constrained, mixed-voltage, noise-prone systems requiring safe power sequencing.

Availability

74AUP1G06GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive wake-up circuits, I²C level shifting, and low-power interrupt aggregation requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G06GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable logic, discrete, and MOSFET solutions optimized for efficiency, miniaturization, and robustness in high-volume applications.

The 74AUP (Advanced Ultra-low Power) logic family targets portable, battery-powered, and thermally constrained systems where nanowatt static power and rail-flexible operation are mandatory design requirements.

FAQ

Can the 74AUP1G06GM,132 drive an LED directly?

No. Its open-drain Y output can only sink current - it lacks high-side drive capability. To drive an LED, connect the anode to a positive rail (e.g., 3.3 V) and the cathode to Y, then select a series resistor based on VOH = VCC and VOL ≤ 0.5 V at IO = 4 mA. Do not exceed 20 mA sink current or 250 mW total package dissipation.

Does the IOFF feature require external control signals?

No. IOFF is fully automatic and internally managed: when VCC drops below approximately 0.2 V, the IOFF circuitry engages without any enable pin or configuration register. Input and output terminals become high-impedance, blocking current flow in both directions regardless of A or Y voltage levels.

Is the Schmitt-trigger hysteresis adjustable?

No. Hysteresis is fixed by internal transistor sizing and cannot be modified. At VCC = 1.8 V, typical VIH = 1.17 V and VIL = 0.54 V, yielding ~630 mV hysteresis. This value scales proportionally with VCC and is guaranteed across −40 °C to +125 °C per datasheet Table 7.

What is the maximum recommended pull-up resistance for Y?

For 3.3 V operation with 400 kHz I²C timing, use RP ≤ 2.2 kΩ to meet tR ≤ 300 ns. At 1.8 V and 100 kHz, RP ≤ 10 kΩ suffices. Exceeding 15 kΩ risks violating VOL spec under load or increasing propagation delay beyond 10 ns, especially at low VCC or high temperature.