NXP Semiconductors 74AUP1G07GM,132
- Part No.:
- 74AUP1G07GM,132
- Manufacturer:
- NXP Semiconductors
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G07GM,132.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:73,500
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Product details
Overview
74AUP1G07GM,132 from Nexperia is a single low-power CMOS buffer with open-drain output and Schmitt-trigger input, operating across 0.8 V to 3.6 V supply. It delivers ICC ≤ 1.4 μA max at −40 °C to +125 °C, supports IOFF partial power-down, and tolerates overvoltage inputs up to 3.6 V - used in I²C bus level-shifting and GPIO signal conditioning in space-constrained IoT sensor nodes.
For engineers reviewing the 74AUP1G07GM,132 datasheet, 74AUP1G07GM,132 pinout, 74AUP1G07GM,132 application, or 74AUP1G07GM,132 equivalent, key selection criteria include open-drain drive capability (IO = 4 mA @ VCC = 3.0 V), ultra-low static current, Schmitt-trigger noise immunity, and XSON6 package compatibility with automated optical inspection (AOI) and reflow soldering in high-volume wearables.
Technical Context
This device implements a non-inverting logic buffer with open-drain output stage and integrated Schmitt-trigger input hysteresis (VIH − VIL ≥ 0.3×VCC at 1.4 V), enabling robust operation with slow-rising signals from mechanical switches or RC networks. The IOFF circuit actively disables output leakage when VCC = 0 V, preventing backfeed current in multi-rail systems.
Designed for mixed-voltage interfacing, it accepts 3.6 V-tolerant inputs while powered from as low as 0.8 V, and exhibits propagation delay tpd ≤ 3.6 ns (CL = 5 pF, VCC = 3.3 V) with dynamic power dissipation governed by CPD = 1.2 pF - making it suitable for battery-powered wake-up signal conditioning where timing predictability and quiescent current are critical.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface between 1.2 V, 1.8 V, 2.5 V, and 3.3 V domains without external level shifters. |
| Max ICC (−40 °C to +125 °C) | 1.4 μA - ensures sub-μA system standby current contribution in always-on sensor hubs. |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents cross-rail current flow during power sequencing or hot-swap events. |
| Output Drive (VOL @ IO = 4 mA) | ≤ 0.50 V @ VCC = 3.0 V - guarantees reliable LOW-level recognition by 3.3 V CMOS receivers with margin. |
| Input Hysteresis (ΔV = VIH − VIL) | ≥ 330 mV @ VCC = 1.4 V - suppresses chatter on noisy switch inputs or long PCB traces. |
| Propagation Delay (tpd) | ≤ 3.6 ns @ CL = 5 pF, VCC = 3.3 V - supports >100 MHz toggle rates in clock-gating or enable-path logic. |
| ESD Rating (HBM) | 5000 V - meets IEC 61000-4-2 Level 3 for handheld device front-end protection. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body size 1.0 × 1.45 × 0.5 mm; wettable flanks not present; thermal pad absent; pin 1 index located at lower-left corner below marking code.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| n.c. | No-connect terminal (pins 1 and 5) | Electrically isolated; must remain unconnected per datasheet - no internal bonding or routing. |
| A | Data input | Schmitt-trigger buffered input; accepts 0 V to 3.6 V regardless of VCC; drives internal buffer stage. |
| GND | Ground reference (pin 3) | Primary return path for all internal logic and output current; requires low-impedance PCB connection. |
| Y | Open-drain output (pin 4) | Active-LOW only; requires external pull-up to define HIGH state; sinks up to 4 mA. |
| VCC | Supply voltage (pin 6) | Power rail for internal logic; IOFF function activates when VCC = 0 V; decoupling capacitor required. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8 V–3.6 V) | Enables single-bom deployment across 1.2 V microcontrollers, 1.8 V FPGAs, and 3.3 V peripherals without redesign. |
| Schmitt-trigger input | Eliminates need for external RC filtering on pushbutton or encoder inputs - reduces BOM count and board area. |
| IOFF partial power-down | Blocks back-current from live buses into unpowered subsystems - essential for PCIe hot-plug and USB-C port controllers. |
| Overvoltage-tolerant inputs | Accepts 3.6 V signals while VCC = 0.8 V - allows safe interfacing with legacy 3.3 V sensors in ultra-low-power edge nodes. |
| Low-noise switching (<10 % VCC overshoot) | Minimizes EMI in RF-sensitive modules like BLE/Wi-Fi coexistence designs without added ferrite beads. |
Applications
| Industrial Sensor Interface | I²C Bus Level-Shifting |
|---|---|
|
Use Scenario: A factory-floor temperature sensor node uses a 1.8 V MCU but connects to a 3.3 V analog front-end via open-drain interrupt line. IC Role / Device Role / Timing Role: Signal conditioner and voltage-domain isolator - converts MCU GPIO logic levels to 3.3 V-compatible open-drain interrupt assertion. Use Value: Eliminates discrete MOSFET level shifter; maintains <1 μA sleep current; withstands 3.6 V transients on interrupt line. |
Use Scenario: An embedded gateway bridges 1.2 V SoC I²C master to 3.3 V EEPROM and PMIC slaves on shared bus. IC Role / Device Role / Timing Role: Bidirectional bus buffer with independent VCC domains - isolates voltage rails while preserving I²C timing integrity. Use Value: Supports standard-mode (100 kHz) and fast-mode (400 kHz) I²C without clock stretching; reduces bus capacitance loading vs. passive solutions. |
| Wearable Power Sequencing | Automotive Body Control Module |
|
Use Scenario: A hearable device powers down its Bluetooth radio first, then asserts reset to its 1.2 V audio codec after safe shutdown. IC Role / Device Role / Timing Role: Controlled reset signal generator - provides clean, glitch-free reset pulse using IOFF isolation during power ramp-down. Use Value: Prevents latch-up during asymmetric power-off; ensures codec enters defined reset state even if radio remains partially powered. |
Use Scenario: A door module monitors window switch status and drives LED indicators using mixed 5 V and 3.3 V supplies. IC Role / Device Role / Timing Role: Input debouncer and output driver - conditions mechanical switch bounce and sinks LED current via open-drain Y pin. Use Value: Replaces RC+MCU firmware debounce; achieves <10 ms response time; survives automotive load-dump transients due to 3.6 V input tolerance. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G07DBVR | Higher ICC (10 μA typ), no Schmitt input, VCC min = 1.65 V | Lacks noise immunity for slow-switching sensors; unsuitable below 1.65 V operation | Select only if system operates strictly ≥1.8 V and input edges are clean. |
| 74LVC1G17GW,125 | Same package (TSSOP5), Schmitt input, but push-pull output (not open-drain) | Cannot perform wired-AND or I²C bus sharing; requires redesign of pull-up network | Choose only when active-HIGH drive and no bus arbitration is needed. |
Compared with SN74LVC1G07DBVR and 74LVC1G17GW,125, the 74AUP1G07GM,132 uniquely combines sub-μA ICC, Schmitt-trigger noise rejection, and open-drain flexibility across 0.8–3.6 V - making it the sole option for ultra-low-power, mixed-voltage, and noisy-environment signal conditioning.
Availability
74AUP1G07GM,132 is available at Aetrix Electronics and suitable for industrial sensor nodes, wearable power sequencers, automotive body control modules, and I²C bus extenders requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G07GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions - serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.
The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and energy-harvesting systems, emphasizing nanowatt static power, wide-VCC interoperability, and robustness in thermally constrained environments.
FAQ
Can 74AUP1G07GM,132 drive an LED directly?
No - its open-drain Y output sinks current only; driving an LED requires an external pull-up to VCC and series resistor. Maximum sink current is 4 mA at VOL ≤ 0.5 V (VCC = 3.0 V), limiting LED brightness. For higher current, pair with a discrete MOSFET or dedicated LED driver IC.
Does the IOFF feature work when VCC is floating?
No - IOFF activates only when VCC = 0 V (grounded). If VCC is floating, internal circuitry is undefined and output may leak. Always tie VCC to GND or a defined voltage during power-down; never leave it unconnected.
Is pin 1 location consistent across all XSON6 variants of this part?
Yes - per datasheet Fig. 7 and Table 3, pin 1 is the lower-left terminal (viewed top-side, marking up), adjacent to the marking code "pS". This applies identically to SOT886 (74AUP1G07GM), SOT1115 (74AUP1G07GN), and SOT1202 (74AUP1G07GS).
What is the minimum recommended PCB pad layout for SOT886?
Nexperia recommends copper pads matching SOT886 footprint per IPC-7351B: 0.25 mm × 0.85 mm for terminals 2 (A), 3 (GND), 4 (Y), and 6 (VCC); 0.25 mm × 0.35 mm for n.c. pins 1 and 5; 0.1 mm soldermask opening; and no thermal relief on GND pad to maximize heat dissipation.
74AUP1G07GM,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Open Drain
- Current - Output High, Low:
- -, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1G07GM,132 FAQ
1.How can I place an order for 74AUP1G07GM,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G07GM,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G07GM,132 reliable?
The price and inventory of 74AUP1G07GM,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G07GM,132 is usually 5 days.
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5.How can I obtain technical support or documentation for 74AUP1G07GM,132?
For technical support, including 74AUP1G07GM,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G07GM,132 requirements.
6.How does Aetrix verify that 74AUP1G07GM,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G07GM,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G07GM,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1G07GM,132?
All 74AUP1G07GM,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G07GM,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G07GM,132 part is unused and in its original packaging.
Return procedure for 74AUP1G07GM,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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