NXP Semiconductors 74AUP1G07GX,125
- Part No.:
- 74AUP1G07GX,125
- Manufacturer:
- NXP Semiconductors
- Package:
- 4-XFDFN Exposed Pad
- Datasheet:
-
74AUP1G07GX,125.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 5X2SON
- Quantity:
- Payment:

- Shipping:

Inventory:9,500
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Product details
Overview
74AUP1G07GX,125 from Nexperia is a single low-power CMOS buffer with open-drain output and Schmitt-trigger input, operating across 0.8 V to 3.6 V supply. It delivers ICC ≤ 1.4 μA (max) at −40 °C to +125 °C, supports IOFF partial power-down, and features ±0.75 μA input leakage and 0.5 V VOL (IO = 4 mA, VCC = 3.0 V). It is used in level-shifting I²C bus interfaces and battery-powered sensor node pull-up drivers.
For engineers reviewing the 74AUP1G07GX,125 datasheet, 74AUP1G07GX,125 pinout, 74AUP1G07GX,125 application, or 74AUP1G07GX,125 equivalent, key selection criteria include open-drain drive capability, sub-1 μA static current at 125 °C, IOFF-enabled system-level power sequencing, and compatibility with 0.8 V logic domains in ultra-low-power microcontroller peripherals.
Technical Context
This device implements a non-inverting buffer stage with hysteresis (Schmitt-trigger input), enabling robust operation with slow-rising signals and noise immunity up to ±30 % of VCC. Its open-drain output requires an external pull-up and supports wired-AND logic and voltage-level translation between disparate supply domains.
The IOFF circuit actively disables the output when VCC = 0 V, blocking backflow current up to ±0.75 μA - critical for hot-swap and multi-rail power sequencing. Input tolerance extends to 3.6 V regardless of VCC, allowing interfacing with higher-voltage controllers while powered from lower supplies.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - enables direct interface with 0.8 V core logic and 3.3 V I/O domains without level shifters. |
| Max ICC (−40 °C to +125 °C) | 1.4 μA - ensures <1.5 μW static power at 1.8 V, suitable for decade-long battery operation in IoT endpoints. |
| Output Type | Open-drain - permits bidirectional bus sharing (e.g., I²C), wired-AND logic, and flexible pull-up voltage selection. |
| VOL @ 4 mA, 3.0 V | 0.50 V max - guarantees reliable LOW-state margin for 3.3 V logic receivers with ≥0.8 V noise immunity. |
| Input Hysteresis | Typ. 100 mV - suppresses chatter on noisy or slow edges (e.g., mechanical switch inputs or long PCB traces). |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents cross-rail current injection during power-down, protecting upstream 1.8 V or 2.5 V supplies. |
| ESD Rating (HBM) | 5000 V - exceeds JEDEC JS-001 Class 3A, supporting handling in standard assembly environments without special ESD controls. |
Pinout & Package
X2SON5 package (SOT1226-3): plastic thermal-enhanced extremely thin small outline, no leads, 5 terminals, body size 0.8 × 0.8 × 0.32 mm, side-wettable flanks not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (n.c.) | No-connect | Internally unconnected; must be left floating or grounded per layout best practice - no electrical function. |
| 2 (A) | Data input | Schmitt-triggered input accepting 0–3.6 V; immune to slow edges and noise; drives internal buffer stage. |
| 3 (GND) | Ground reference | 0 V return path for all internal circuitry and output current; must be low-impedance for stable IOFF behavior. |
| 4 (Y) | Open-drain output | Drains current only; requires external pull-up; sinks up to 20 mA; supports mixed-voltage bus termination. |
| 5 (VCC) | Supply voltage | Primary power rail (0.8–3.6 V); powers internal logic and enables IOFF control - disconnecting disables Y. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temperature range - eliminates quiescent drain in always-on sensor wake-up circuits. |
| IOFF partial power-down | Blocks backflow current (±0.75 μA max) when VCC = 0 V - enables safe insertion into live backplanes or multi-supply systems. |
| Wide VCC compatibility | Operates from 0.8 V to 3.6 V - supports direct connection to modern sub-1 V processors and legacy 3.3 V peripherals. |
| Overvoltage-tolerant inputs | Accepts VI up to 3.6 V independent of VCC - allows interfacing with 3.3 V GPIO while powered from 1.2 V core rail. |
| High-noise-immunity input | Schmitt-trigger threshold hysteresis ~100 mV - rejects EMI-induced glitches on long traces or unshielded cables. |
Applications
| Industrial Sensor Interface | I²C Bus Level Shifter |
|---|---|
|
Use Scenario: Connecting 1.8 V microcontroller GPIO to 3.3 V analog sensor alert line with slow edge rates and EMI exposure. IC Role / Device Role / Timing Role: Buffer with Schmitt-trigger input cleans noisy interrupt signal; open-drain output pulls down shared 3.3 V bus line. Use Value: Eliminates need for discrete RC filtering and dual-supply level shifter; reduces BOM count by one IC and two passives. |
Use Scenario: Enabling communication between 0.8 V FPGA I/O bank and standard 3.3 V I²C EEPROM in ultra-low-power configuration mode. IC Role / Device Role / Timing Role: Acts as unidirectional level translator on SDA line; open-drain output matches I²C bus topology requirements. Use Value: Supports 0.8 V logic domain without compromising 3.3 V bus timing margins; maintains VOL < 0.5 V at 4 mA sink current. |
| Battery-Powered Wake-Up Circuit | Hot-Swappable Module Control |
|
Use Scenario: Monitoring mechanical switch closure in coin-cell-powered asset tracker, requiring nanowatt standby and glitch-free wake detection. IC Role / Device Role / Timing Role: Schmitt-trigger input debounces switch bounce; open-drain output asserts MCU WAKE# line pulled to VBAT. Use Value: Achieves <1.5 μA total system standby current; hysteresis prevents false triggers from contact bounce or RF coupling. |
Use Scenario: Controlling enable signal for a field-replaceable module powered from separate 2.5 V rail while host remains active on 1.2 V. IC Role / Device Role / Timing Role: IOFF isolates module's EN line during hot-insertion; open-drain output safely interfaces mismatched voltage domains. Use Value: Prevents backfeed from 2.5 V module into 1.2 V host during insertion; eliminates risk of latch-up or supply contention. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar open-drain buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G07DBVR | Higher ICC (10 μA typ), wider VCC (1.65–5.5 V), no IOFF, no Schmitt input | Requires external debounce for noisy inputs; unsuitable for true zero-VCC isolation | Prefer when 5 V tolerance or higher drive strength (24 mA) is needed, and power-down isolation is not required. |
| 74LVC1G17GW,125 | Same package (TSSOP5), Schmitt input, push-pull output (not open-drain), ICC ≤ 2 μA | Cannot perform wired-AND or level translation; incompatible with I²C or shared-bus topologies | Choose only when a buffered, noise-immune push-pull driver is sufficient and bus-sharing is unnecessary. |
Compared with SN74LVC1G07DBVR and 74LVC1G17GW,125, the 74AUP1G07GX,125 uniquely combines sub-μA ICC, IOFF, Schmitt input, and open-drain output - making it the sole option for ultra-low-power, multi-rail, noise-prone, bus-shared use cases.
Availability
74AUP1G07GX,125 is available at Aetrix Electronics and suitable for industrial sensor nodes, battery-powered IoT endpoints, I²C subsystems, and hot-pluggable module control requiring stable component supply across extended temperature and ultra-low-power constraints.
Supply support for 74AUP1G07GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable logic, analog, and MOSFET solutions with focus on efficiency, miniaturization, and automotive-grade reliability.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-constrained applications such as wearables, medical sensors, and smart meters where sub-microamp quiescent current and wide VCC range are mandatory design requirements.
FAQ
Can 74AUP1G07GX,125 drive a 10 kΩ pull-up to 5 V?
No. The output is rated for VO ≤ 3.6 V maximum and IO ≤ 20 mA. Driving a 5 V pull-up violates absolute maximum ratings and risks permanent damage. Use only with pull-ups ≤ 3.6 V, ideally matched to VCC or lower.
Does the Schmitt-trigger input affect propagation delay?
Yes - hysteresis adds ~0.3 ns to typical tpd versus non-hysteresis variants, but enables reliable switching on edges slower than 200 ns/V. At VCC = 1.8 V and CL = 15 pF, tpd remains ≤ 6.7 ns, preserving timing integrity in most low-speed interfaces.
Is pin 1 marking visible on the X2SON5 package?
Yes. Per datasheet Figure 10 and Table 2, the pin 1 indicator is a laser-marked dot located on the lower-left corner of the device body, adjacent to the "pS" marking code, and verified under 20× magnification during incoming inspection.
How does IOFF behave when VCC ramps from 0 V to nominal?
IOFF activates when VCC falls below ~0.2 V and remains active until VCC exceeds ~0.4 V. During this transition, output leakage stays ≤ ±0.75 μA. Full functionality resumes only after VCC stabilizes above 0.8 V, per recommended operating conditions.
74AUP1G07GX,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 4-XFDFN Exposed Pad
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Open Drain
- Current - Output High, Low:
- -, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-X2SON (0.80x0.80)
74AUP1G07GX,125 FAQ
1.How can I place an order for 74AUP1G07GX,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G07GX,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G07GX,125 reliable?
The price and inventory of 74AUP1G07GX,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G07GX,125 is usually 5 days.
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5.How can I obtain technical support or documentation for 74AUP1G07GX,125?
For technical support, including 74AUP1G07GX,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G07GX,125 requirements.
6.How does Aetrix verify that 74AUP1G07GX,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G07GX,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G07GX,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G07GX,125?
All 74AUP1G07GX,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G07GX,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G07GX,125 part is unused and in its original packaging.
Return procedure for 74AUP1G07GX,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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