Send an Inquiry

To receive a quote for your project, please fill in the following information, and we’ll get back to you promptly.

Submit Inventory List

Please fill in the following information, and we’ll get back to you promptly.

Home > Products > Integrated Circuits (ICs) > Logic > Gates and Inverters

Nexperia USA Inc. 74AUP1G08GM,115

Name: 74AUP1G08GM,115
Brand: Nexperia USA Inc.
SKU: 74AUP1G08GM,115
Price: 2.40 USD
Availability: InStock
Rating: 5 (2 reviews)

Compare

Part No.:: 74AUP1G08GM,115

Manufacturer:: Nexperia USA Inc.

Category:: Gates and Inverters

Package:: 6-XFDFN

Datasheet:: 74AUP1G08GM,115.pdf

Description:: IC GATE AND 1CH 2-INP 6XSON

Quantity:: RFQ Add To RFQ list

Payment:

Shipping:

Inventory:1,184

Please send an inquiry. Send us your inquiry, and we will respond immediately.

Product details

Overview

74AUP1G08GM,115 from Nexperia is a single 2-input AND gate in XSON6 (SOT886) package with Schmitt-trigger inputs, operating from 0.8 V to 3.6 V supply, delivering propagation delay as low as 1.0 ns at 3.6 V/CL = 5 pF, and ICC ≤ 0.9 μA max - deployed in battery-powered sensor interface logic and low-voltage I²C bus signal conditioning.

For engineers reviewing the 74AUP1G08GM,115 datasheet, 74AUP1G08GM,115 pinout, 74AUP1G08GM,115 application, or 74AUP1G08GM,115 equivalent, key selection criteria include IOFF-enabled partial power-down capability, overvoltage-tolerant 3.6 V inputs on sub-1 V supplies, ±0.75 μA max input leakage at −40 °C to +125 °C, and verified 1.4 mm × 1.45 mm footprint compatibility with automated optical inspection (AOI) and reflow profiles for high-density PCBs.

Technical Context

This device implements standard positive-logic AND functionality with Schmitt-trigger hysteresis on both inputs (typical ΔV = 0.1 V), enabling robust noise immunity against slow-rising signals in mixed-signal environments. Its IOFF circuit actively disables output terminals when VCC = 0 V, blocking backflow current up to ±0.75 μA.

Dynamic performance is characterized across four VCC ranges (0.8–1.3 V, 1.4–1.6 V, 1.65–1.95 V, 2.3–3.6 V), with propagation delay bounded between 0.9 ns (min, 3.0–3.6 V) and 24.1 ns (max, 0.8 V/CL = 15 pF) under industrial temperature range (−40 °C to +125 °C).

Key Specifications

Parameter	Value and Actual Design Meaning
Supply Voltage	0.8 V to 3.6 V - supports direct interfacing with 0.9 V FPGA I/O banks and 3.3 V microcontrollers without level shifters.
Propagation Delay	0.9 ns (min) to 4.8 ns (max) at VCC = 3.0–3.6 V/CL = 10 pF - enables timing-critical glue logic in 100+ MHz control paths.
IOFF Leakage	±0.75 μA max at VCC = 0 V - prevents cross-talk and power rail contamination during hot-swap or partial system shutdown.
Input Hysteresis	Typical 0.1 V - rejects <100 mV noise spikes on slow-switching analog sensor outputs or mechanical switch debouncing lines.
ESD Rating	HBM >5000 V, CDM >1000 V - survives handling and board-level ESD events without latch-up (exceeds JESD78 Class II Level B).
Operating Temp	−40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drive control logic.

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; wettable flanks not present; thermal pad absent.

Pin/Terminal	Circuit Role	Design Meaning
1	A	Primary data input with Schmitt-trigger threshold; accepts 0–3.6 V regardless of VCC (overvoltage tolerant).
2	B	Secondary data input with identical Schmitt characteristics; enables asynchronous enable/disable gating of clock or data streams.
3	GND	Dedicated ground reference; must be connected directly to PCB ground plane to maintain <10% VCC overshoot/undershoot.
4	Y	Push-pull CMOS output; drives loads up to ±4 mA at 3.0 V while maintaining VOL ≤ 0.45 V and VOH ≥ 2.30 V.
5	n.c.	No-connect terminal - electrically isolated and unbonded; must remain floating per datasheet.
6	VCC	Single-supply rail input; powers internal logic and output stage; IOFF activates automatically when voltage drops below 0.2 V.

Key Features

Feature	Design Value
Wide VCC range	0.8–3.6 V operation eliminates need for separate voltage regulators in multi-rail systems.
IOFF partial power-down	Output disabled at VCC = 0 V, preventing backfeed into powered subsystems during firmware updates or sleep mode.
Schmitt-trigger inputs	Input hysteresis ensures clean transitions on noisy or slow edges (e.g., thermistor ADC reference switching).
Low dynamic power	CPD = 4.0 pF at 3.6 V enables <1 μW dynamic dissipation at 1 MHz with 5 pF load - critical for coin-cell IoT nodes.
High noise immunity	VIH/VIL thresholds scale with VCC (e.g., VIH = 0.65×VCC min), maintaining noise margin across full supply range.

Applications

Industrial Sensor Interface

Low-Power Wearable Control

Use Scenario: Combining motion-detection interrupt and battery-low alert signals before waking an MCU from deep sleep.

IC Role / Device Role / Timing Role: Dual-input AND gate synchronizing two asynchronous wake sources with sub-microsecond latency.

Use Value: Reduces average system current by enabling precise wake-event qualification, avoiding spurious interrupts from noisy analog sensors.

Use Scenario: Enabling display backlight only when both touch-detect and ambient light sensor indicate user presence.

IC Role / Device Role / Timing Role: Power-gating logic element controlling PMIC enable line with zero static current draw in standby.

Use Value: Extends CR2032 battery life by >30% versus always-on enable path, leveraging IOFF to isolate downstream rails.

Automotive Body Control

I²C Bus Signal Conditioning

Use Scenario: Validating door-lock command only when both CAN message CRC check passes and physical solenoid feedback confirms readiness.

IC Role / Device Role / Timing Role: Safety-critical interlock gate ensuring dual-redundant validation before actuator activation.

Use Value: Meets ASIL-B functional safety requirements via hardware-enforced AND condition, independent of software stack.

Use Scenario: Isolating I²C SDA/SCL lines between 1.8 V sensor node and 3.3 V host controller during power sequencing.

IC Role / Device Role / Timing Role: Level-translating AND gate with overvoltage-tolerant inputs preserving signal integrity across voltage domains.

Use Value: Eliminates external MOSFET translators while maintaining I²C timing budgets (tBUF, tHD:STA) at 400 kHz.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input AND gate applications.

Alternative Part	Technical Difference	Application Difference	Selection Advice
SN74LVC1G08DBVR	Wider VCC range (1.65–5.5 V); no Schmitt inputs; IOFF not supported; 3.5 ns min tpd at 3.3 V.	Requires external pull-ups for open-drain buses; unsuitable for sub-1 V logic or partial power-down systems.	Select when interfacing with 5 V peripherals and Schmitt noise rejection is unnecessary.
74LVC1G08GW,125	TSSOP5 package (SOT353-1); same logic function but larger 2.2 mm × 1.35 mm footprint; identical electrical specs except 0.1 ns slower tpd.	Preferred for manual rework or legacy PCBs with TSSOP land patterns; lower thermal resistance than XSON6.	Select when AOI compatibility or thermal margin outweighs size constraints in space-constrained designs.

Compared with SN74LVC1G08DBVR and 74LVC1G08GW,125, the 74AUP1G08GM,115 uniquely delivers sub-1 V operation, Schmitt noise filtering, and IOFF protection - making it the only choice for ultra-low-power, mixed-voltage, or hot-swap-capable systems.

Availability

74AUP1G08GM,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, wearable power management, and I²C signal conditioning requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G08GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for reliability and energy efficiency.

The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and thermally constrained applications where nanowatt static power, wide-VCC compatibility, and robust IO behavior are mandatory design requirements.

FAQ

Can 74AUP1G08GM,115 operate reliably at 0.85 V supply?

Yes. The device is fully specified down to 0.8 V with guaranteed VIH ≥ 0.70×VCC and VOL ≤ 0.31 V at 1.1 V/1.1 mA. At 0.85 V, propagation delay increases to ~18 ns (CL = 5 pF), but logic functionality remains valid per datasheet Table 7 limits.

What is the maximum capacitive load this AND gate can drive?

The output is rated for ±4.0 mA at VCC = 3.0 V, supporting typical CL ≤ 50 pF while maintaining VOL ≤ 0.45 V and VOH ≥ 2.30 V. For CL > 30 pF, propagation delay increases linearly - e.g., 6.2 ns at 30 pF/3.6 V - but no derating or instability occurs.

Does the n.c. pin on SOT886 require PCB routing or grounding?

No. Pin 5 is electrically unconnected and unbonded per datasheet Table 3. It must remain unconnected on the PCB - neither routed nor grounded - to avoid parasitic coupling or mechanical stress on the die attach.

How does IOFF behave when VCC ramps from 0 V to nominal voltage?

IOFF remains active until VCC exceeds ~0.2 V, holding Y in high-impedance state. Once VCC rises above 0.4 V, normal logic operation resumes with propagation delay stabilizing within 100 ns - confirmed by Figure 9 transient characterization in the datasheet.

74AUP1G08GM,115 Specifications

Product attributes: Attribute value

Manufacturer:: Nexperia USA Inc.

Series:: 74AUP

Package/Case:: 6-XFDFN

Packaging:: Tape & Reel (TR)

Product Status:: Active

Logic Type:: AND Gate

Number of Circuits:: 1

Number of Inputs:: 2

Features:: -

Voltage - Supply:: 0.8V ~ 3.6V

Current - Quiescent (Max):: 500 nA

Current - Output High, Low:: 4mA, 4mA

Input Logic Level - Low:: 0.7V ~ 0.9V

Input Logic Level - High:: 1.6V ~ 2V

Max Propagation Delay @ V, Max CL:: 6.2ns @ 3.3V, 30pF

Operating Temperature:: -40°C ~ 125°C

Grade:: -

Qualification:: -

Mounting Type:: Surface Mount

Supplier Device Package:: 6-XSON, SOT886 (1.45x1)

74AUP1G08GM,115 FAQ

1.How can I place an order for 74AUP1G08GM,115 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G08GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G08GM,115 reliable?

The price and inventory of 74AUP1G08GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G08GM,115 is usually 5 days.

3.What payment methods are accepted for 74AUP1G08GM,115?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G08GM,115 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AUP1G08GM,115?

74AUP1G08GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP1G08GM,115 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1G08GM,115?

For technical support, including 74AUP1G08GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G08GM,115 requirements.

6.How does Aetrix verify that 74AUP1G08GM,115 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G08GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G08GM,115 meets industry standards.

7.What is the process for return or replacement of 74AUP1G08GM,115?

All 74AUP1G08GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G08GM,115, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G08GM,115 part is unused and in its original packaging.

Return procedure for 74AUP1G08GM,115:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

Tech Hub

2026-08-21 What Is an LED Driver? Types, Circuits, Dimming, and Selection

An engineering guide to LED driver operation, constant-current and constant-voltage outputs, linear and switching topologies, dimming, IC selection, calculations, replacement compatibility, and fault c…

2026-08-18 Operational Amplifier (Op Amp): Basics, Configurations, Feedback and Applications

Operational amplifier guide covering op amp basics, feedback, ideal vs real op amps, common configurations, buffer circuits, offset, bias current, gain-bandwidth, slew rate, rail-to-rail limits and sel…

2026-08-14 Jumper Cables: How to Use, Connect and Choose Them Safely

Jumper cables guide covering safe connection order, red and black clamp placement, final ground connection, cable gauge, length, clamp quality, copper vs CCA cables, jump starter comparison and battery…

2026-08-11 LDO Regulator: Dropout Voltage, Noise, PSRR and Power Dissipation

LDO regulator guide covering low dropout voltage, power dissipation, thermal design, PSRR, output noise, capacitor stability, adjustable LDO circuits, LDO vs buck converter and datasheet selection chec…

2026-08-06 Conditional Access Module: CAM, CI/CI+ and DVB Security

Conditional Access Module guide covering CAM meaning, CI/CI+ interface, smart card authorization, DVB security workflow, TV and set-top box compatibility, internal electronics, ESD protection, connecto…

2026-08-03 Electronic Component Obsolescence: EOL Risks, Replacement Options and Last-Time Buy Strategy

Guide to electronic component obsolescence covering EOL risk, PCN/PDN notices, last-time buy planning, replacement options, form-fit-function validation, counterfeit risk and BOM lifecycle management.

2026-07-29 18650 Battery: Voltage, Capacity, Charging and Pack Design

18650 battery guide covering lithium-ion cell basics, 3.6V/3.7V voltage, 4.2V charging, mAh and Wh capacity, protected cells, chargers, BMS, series-parallel packs, holders, welding and sourcing checks.…

2026-07-27 Hall Effect Sensor: Working Principle, Types, Circuits and Applications

Hall effect sensor guide covering working principle, linear and digital sensors, Arduino circuits, current sensing, speed detection, automotive applications, A3144 examples, signal filtering and datash…

2026-07-20 Product Change Notification (PCN) in Electronic Components: Meaning and Supply Chain Response

Product Change Notification guide for electronic components, covering PCN meaning, PCN vs PDN/EOL, common change types, risk levels, form-fit-function review, engineering validation, BOM control, LTB/L…

2026-07-19 Blend Door Actuator: Symptoms, Location, Reset and Replacement Guide

A practical guide to blend door actuators, covering HVAC function, symptoms, location, AC and heater issues, reset and calibration, replacement cost, electrical diagnosis, compatibility checks, and rep…