Nexperia USA Inc. 74AUP1G08GS,132

Overview

74AUP1G08GS,132 from Nexperia is a single 2-input CMOS AND gate in XSON6 package (SOT1202), operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. It delivers ultra-low static current (≤1.4 μA max) and propagation delay as low as 0.9 ns at 3.6 V with 5 pF load, enabling use in battery-powered sensor interfaces and low-voltage logic translation.

For engineers reviewing the 74AUP1G08GS,132 datasheet, 74AUP1G08GS,132 pinout, 74AUP1G08GS,132 application, or 74AUP1G08GS,132 equivalent, this device is selected for ultra-low-power combinational logic in space-constrained industrial controllers, wearables, and IoT edge nodes where supply voltage scalability and power-down isolation are critical.

Technical Context

The 74AUP1G08GS,132 implements standard positive-logic AND functionality with Schmitt-trigger inputs that tolerate slow-rising/falling edges and provide hysteresis (typ. 0.1 × VCC), enhancing noise rejection in noisy environments. Its IOFF circuit actively disables outputs when VCC = 0 V, blocking backflow current during partial system power-down.

All inputs and outputs are overvoltage tolerant to 3.6 V regardless of VCC level, and the device complies with JEDEC standards JESD8-12 through JESD8C across its full 0.8–3.6 V range. ESD robustness exceeds 5000 V HBM and 1000 V CDM, supporting handling in automated assembly lines.

Key Specifications

Pinout & Package

XSON6 package (SOT1202): 1.0 mm × 1.0 mm × 0.35 mm body, no leads, 6 terminals, side-wettable flanks not present, thermal pad absent.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input AND gate applications.

Compared with SN74LVC1G08DBVR and 74LVC1G08GW,125, the 74AUP1G08GS,132 uniquely combines sub-μA static current, IOFF, Schmitt inputs, and 1.0 mm × 1.0 mm XSON6 packaging-making it the only choice for space- and power-critical always-on edge logic.

Availability

74AUP1G08GS,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable power management, and automotive body control requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G08GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.

The 74AUP (Advanced Ultra-low Power) family targets battery-operated and thermally constrained systems, emphasizing near-zero static power, wide VCC scalability, and robust IO architecture for next-generation portable and industrial electronics.

FAQ

Does 74AUP1G08GS,132 support mixed-voltage operation between inputs and VCC?

Yes. Inputs and outputs are overvoltage tolerant to 3.6 V regardless of VCC setting (0.8–3.6 V). This allows safe interfacing with higher-voltage signals-for example, a 3.3 V GPIO driving an input while VCC = 1.8 V-without external clamping or level-shifting circuitry.

What is the recommended PCB layout for thermal and signal integrity?

Place a 100 nF ceramic decoupling capacitor between VCC (Pin 6) and GND (Pin 3) with trace length <2 mm. Use solid ground plane beneath the XSON6 body. Avoid routing high-speed signals under the package. No thermal pad or solder paste stencil opening is required-the SOT1202 package has no exposed thermal pad.

Can Pin 5 (n.c.) be used as a heatsink or grounded for EMI reduction?

No. Pin 5 is internally unconnected. It may be left floating or tied to GND solely for mechanical stability or EMI shielding-however, doing so provides no electrical benefit and must not be assumed to carry current or dissipate heat. Nexperia specifies no thermal or electrical function for this terminal.

How does IOFF behave during VCC ramp-up or brownout conditions?

IOFF activates when VCC falls below ~0.2 V and remains active until VCC rises above ~0.5 V. During this window, output leakage is limited to ±0.75 μA. The device does not guarantee controlled output state during VCC transitions-designers must ensure external pull resistors or system-level arbitration prevent bus contention during power sequencing.