Nexperia USA Inc. 74AUP1G08GZYL

Overview

74AUP1G08GZYL from Nexperia is a single 2-input AND gate logic IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ultra-low static current (≤1.4 μA max at −40 °C to +125 °C), IOFF-enabled partial power-down protection, and propagation delay as low as 0.9 ns at 3.0 V with 5 pF load. It serves in voltage-level translation, signal conditioning, and enable/control logic in space-constrained battery-powered IoT sensors and portable medical monitors.

For engineers reviewing the 74AUP1G08GZYL datasheet, 74AUP1G08GZYL pinout, 74AUP1G08GZYL application, or 74AUP1G08GZYL equivalent, key selection criteria include its guaranteed operation down to 0.8 V, side-wettable flank (SWF) XSON5 package for automated optical inspection, IOFF leakage ≤±0.75 μA at VCC = 0 V, and −40 °C to +125 °C extended temperature rating for automotive body control modules.

Technical Context

This device implements standard positive-logic AND functionality (Y = A · B) with hysteresis on both inputs, enabling robust noise immunity against slow-rising signals and rail-to-rail input tolerance up to 3.6 V regardless of VCC. Its CMOS design ensures rail-compatible output swing and near-zero static power draw.

The IOFF circuit actively disables outputs during power-down by isolating I/O terminals when VCC = 0 V, preventing backflow current into powered sections of mixed-voltage systems-critical for hot-swap and partial-power-down architectures in industrial PLC I/O modules.

Key Specifications

Pinout & Package

XSON5 plastic thermal enhanced extremely thin small outline package with side-wettable flanks (SWF); no leads; 5 terminals; body 1.1 × 0.85 × 0.5 mm (SOT8065-1).

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input AND gate applications.

Compared with SN74LVC1G08DBVR and 74AHC1G08SE-7, the 74AUP1G08GZYL uniquely combines ultra-low voltage operation (0.8 V), guaranteed IOFF, Schmitt inputs, and SWF packaging-making it the sole choice for battery-critical, automotive-qualified, and noise-prone embedded control.

Availability

74AUP1G08GZYL is available at Aetrix Electronics and suitable for IoT sensor nodes, automotive body control modules, portable medical monitors, and industrial PLC digital input interfaces requiring stable component supply across extended temperature and low-power constraints.

Supply support for 74AUP1G08GZYL includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for power efficiency and reliability.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power, wide-VCC, and extended-temperature applications in portable, automotive, and industrial electronics-designed specifically for energy-constrained and thermally demanding environments.

FAQ

Does 74AUP1G08GZYL support true 0 V to VCC input voltage range?

Yes. Inputs tolerate 0 V to 3.6 V independent of VCC, enabling use with higher-voltage pull-ups (e.g., 5 V) while powered from 1.2 V or 1.8 V rails. This eliminates external level shifters in mixed-voltage systems and is verified per Table 6 (VI input voltage: 0 to 3.6 V).

How does IOFF function during partial power-down?

When VCC = 0 V, the IOFF circuit disables both input and output buffers, limiting leakage to ±0.75 μA (max) even if inputs or outputs are biased to 3.6 V. This prevents back-current flow into powered subsystems-confirmed in Table 7 (IOFF and ΔIOFF parameters at VCC = 0 V).

Is the SOT8065-1 package compatible with standard reflow profiles?

Yes. The XSON5 package with side-wettable flanks (SWF) is qualified for IPC/JEDEC J-STD-020D reflow profiles, including peak temperatures up to 260 °C. SWF geometry enables post-reflow automated optical inspection of solder fillets-documented in Figure 11 and package revision history.

What is the minimum propagation delay under worst-case conditions?

The minimum guaranteed tpd is 0.9 ns at VCC = 3.0 V, CL = 5 pF, and −40 °C to +125 °C (Table 9). This value is measured at the 50 % switching point (VM = 0.5 × VCC) and applies to both tPLH and tPHL, ensuring predictable timing in high-speed enable paths.