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Diodes Incorporated 74AUP1G09FX4-7

Part No.:
74AUP1G09FX4-7
Manufacturer:
Diodes Incorporated
Category:
Gates and Inverters
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G09FX4-7.pdf
Description:
IC GATE AND 1CH 2-INP DFN1409-6
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:2,695

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Product details

Overview

74AUP1G09FX4-7 from Diodes Incorporated is a single 2-input positive AND gate with open-drain output, designed for ultra-low-power portable systems operating from 0.8 V to 3.6 V. It features IOFF partial power-down protection, Schmitt-trigger inputs (250 mV hysteresis at 3.0 V), and delivers 4 mA output drive at 3.0 V - enabling direct interface with I²C, SMBus, and level-shifting applications in battery-powered wearables and IoT edge nodes.

For engineers reviewing the 74AUP1G09FX4-7 datasheet, 74AUP1G09FX4-7 pinout, 74AUP1G09FX4-7 application, or 74AUP1G09FX4-7 equivalent, key selection criteria include its 0.8–3.6 V supply range, open-drain topology for wired-AND bus implementation, IOFF-enabled power sequencing, sub-1 µA static current, and verified operation across –40°C to +125°C ambient.

Technical Context

This device implements a Boolean AND function (Y = A • B) with open-drain output, requiring an external pull-up resistor to define high-level logic voltage. Its Schmitt-trigger inputs tolerate slow-rising signals and reject noise, with hysteresis of 250 mV at VCC = 3.0 V and input thresholds scaling with supply voltage (VIH = 0.8×VCC min at 0.8–1.65 V).

The IOFF circuit actively disables output leakage when VCC = 0 V, preventing backflow current during partial power-down - critical for multi-rail systems where peripherals power down before controllers. Propagation delay ranges from 0.9 ns (typ, 3.3 V, CL = 5 pF) to 2.3 ns (typ, 3.3 V, CL = 30 pF), supporting low-speed digital control and bus arbitration timing.

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage Range 0.8 V to 3.6 V - enables direct integration into 1.2 V, 1.8 V, 2.5 V, and 3.3 V domains without level shifters.
Output Type Open-drain - supports wired-AND logic, I²C/SMBus compatibility, and flexible pull-up voltage selection independent of VCC.
IOFF Leakage ±0.2 µA max at –40°C to +85°C - ensures safe isolation during power sequencing in mixed-voltage systems.
Static Current (ICC) < 0.9 µA max at 25°C - extends battery life in always-on sensor nodes and standby circuits.
Input Hysteresis 250 mV typ at VCC = 3.0 V - rejects noise on slow-switching control lines (e.g., mechanical switch debouncing, GPIO wake-up).
Propagation Delay 0.9 ns typ (3.3 V, CL = 5 pF) - sufficient for sub-100 MHz digital control, not intended for high-speed data paths.
ESD Protection 2 kV HBM, 1 kV CDM - meets industrial handling requirements without additional protection circuitry.

Pinout & Package

X2-DFN1409-6 package: 1.4 mm × 0.9 mm × 0.4 mm body, 0.5 mm pad pitch, no leads, bottom thermal pad (non-electrical), moisture sensitivity level 1.

Pin/Terminal Circuit Role Design Meaning
1 A Input First logic input; Schmitt-triggered, compatible with slow or noisy signals.
2 GND Ground reference for all internal circuitry and output discharge path.
3 Y Output Open-drain output; requires external pull-up; sinks up to 4 mA at 3.0 V.
4 VCC Power supply input; IOFF active when VCC = 0 V to block backfeed.
5 B Input Second logic input; identical Schmitt-trigger characteristics as Pin 1.
6 NC No internal connection; must be left floating or tied to GND per layout guidelines.

Key Features

Feature Design Value
Ultra-low static power ICC < 0.9 µA ensures negligible battery drain in always-on monitoring circuits.
IOFF partial power-down Prevents damaging current flow when VCC is off but inputs remain active - essential for hot-swap and multi-rail SoC interfaces.
Schmitt-trigger inputs 250 mV hysteresis at 3.0 V eliminates false triggering from EMI or slow edges in industrial control lines.
Wide voltage operation 0.8–3.6 V range supports direct use with Li-ion battery (2.8–4.2 V), LDO outputs (1.2/1.8/2.5/3.3 V), and energy-harvesting sources.
Open-drain output Enables bidirectional bus sharing (e.g., interrupt lines), voltage-level translation, and wired-AND logic without external components.

Applications

Wearable Sensor Hub I²C Bus Arbitration

Use Scenario: Aggregating interrupt signals from multiple MEMS sensors (accelerometer, gyroscope, magnetometer) in a smartwatch.

IC Role / Device Role / Timing Role: Wired-AND combiner feeding a single MCU interrupt pin; open-drain output allows shared line with pull-up to MCU's I/O voltage.

Use Value: Eliminates discrete diodes or logic gates; IOFF prevents backfeed when sensor hub powers down independently of host MCU.

Use Scenario: Resolving bus contention between two I²C masters sharing one slave address space.

IC Role / Device Role / Timing Role: AND gate synchronizing enable signals before clock stretching; Schmitt inputs clean up delayed ACK/NACK edges.

Use Value: Ensures deterministic bus release timing; sub-1 ns propagation delay avoids race conditions in multi-master arbitration.

Low-Power GPIO Expander Interface Industrial Button Debounce Circuit

Use Scenario: Driving an enable signal to a low-quiescent-current PMIC from a microcontroller GPIO with limited drive strength.

IC Role / Device Role / Timing Role: Level-shifting buffer with open-drain output pulled to PMIC's enable rail (e.g., 2.8 V), isolating MCU I/O from higher voltage domain.

Use Value: No level shifter IC required; 4 mA sink capability directly drives PMIC EN pin; IOFF protects MCU during PMIC power cycling.

Use Scenario: Conditioning mechanical push-button input to a microcontroller in a factory HMI panel exposed to EMI.

IC Role / Device Role / Timing Role: Input conditioning stage: Schmitt-trigger inputs suppress contact bounce and noise; AND gate requires both stable high states to assert output.

Use Value: Reduces firmware debounce overhead; 250 mV hysteresis rejects transients up to ±125 mV without RC filters or software delays.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input AND gate with open-drain output applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G09DPWR Higher ICC (10 µA typ), wider VCC range (1.65–5.5 V), no Schmitt inputs, no IOFF. Requires external clamping for hot-swap; unsuitable for sub-1.65 V systems or noisy environments. Choose only if 5 V tolerance or higher drive (8 mA) is needed and power-down isolation is unnecessary.
74AUP2G09DCU3-7 Dual-channel version in same X2-DFN1409-6 package; identical electrical specs per channel. Reduces board area for dual AND functions but increases cost per gate; shares same thermal profile. Select when two independent AND gates are required in space-constrained designs - avoids stacking two single-gate devices.

Compared with SN74LVC1G09DPWR, the 74AUP1G09FX4-7 offers superior low-voltage operation, lower static power, and built-in IOFF - making it optimal for battery-critical and multi-rail embedded systems. Against 74AUP2G09DCU3-7, it provides gate-level flexibility and lower unit cost where only one AND function is needed.

Availability

74AUP1G09FX4-7 is available at Aetrix Electronics and suitable for wearable electronics, IoT sensor nodes, and industrial HMI panels requiring stable component supply, long-term lifecycle support, and RoHS-compliant packaging.

Supply support for 74AUP1G09FX4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, low-power solutions for consumer, industrial, and automotive markets.

The 74AUP logic family targets ultra-low-power portable electronics, emphasizing extended battery life, wide supply range, and robustness in partial-power-down scenarios - directly addressing design constraints in wearables and energy-harvesting systems.

FAQ

What is the maximum recommended pull-up resistor value for the open-drain Y output?

The maximum pull-up resistor depends on VCC, load capacitance, and required rise time. At 3.3 V with 10 pF bus capacitance and 100 ns max rise time, RPU ≤ 10 kΩ ensures full logic high within specification. For slower buses like I²C Standard Mode (100 kHz), 4.7 kΩ is typical; for Fast Mode (400 kHz), ≤ 2.2 kΩ is recommended to meet tr ≤ 300 ns.

Can 74AUP1G09FX4-7 operate with VCC = 0 V while inputs are driven?

Yes - the IOFF feature actively disables the output FET when VCC = 0 V, limiting input-to-output leakage to ±0.2 µA (max) over temperature. This prevents back-current from powered inputs into a dead rail, satisfying JEDEC JESD78 latch-up immunity requirements and enabling safe hot-plug operation in multi-supply systems.

Is the NC pin (Pin 6) required to be grounded?

No - Pin 6 is internally unconnected and must remain floating per Diodes Incorporated layout guidance. Tying it to GND may cause unintended parasitic coupling or violate thermal pad clearance rules. The datasheet specifies "no internal connection" and recommends leaving it unconnected in PCB layout.

Does the Schmitt-trigger input behavior change with supply voltage?

Yes - hysteresis magnitude scales with VCC: it is typically 250 mV at 3.0 V, but decreases proportionally at lower voltages (e.g., ~150 mV at 1.8 V). Input threshold voltages (VIH/VIL) also track VCC per defined ratios (e.g., VIH = 0.8×VCC min for 0.8–1.65 V range), ensuring consistent noise margin across the full 0.8–3.6 V operating window.

74AUP1G09FX4-7 Specifications

Product attributes
Attribute value
Manufacturer:
Diodes Incorporated
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Logic Type:
AND Gate
Number of Circuits:
1
Number of Inputs:
2
Features:
Open Drain
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
-, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
12.7ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
X2-DFN1409-6

74AUP1G09FX4-7 FAQ

1.How can I place an order for 74AUP1G09FX4-7 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G09FX4-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G09FX4-7 reliable?

The price and inventory of 74AUP1G09FX4-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G09FX4-7 is usually 5 days.

3.What payment methods are accepted for 74AUP1G09FX4-7?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G09FX4-7 transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AUP1G09FX4-7?

74AUP1G09FX4-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP1G09FX4-7 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1G09FX4-7?

For technical support, including 74AUP1G09FX4-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G09FX4-7 requirements.

6.How does Aetrix verify that 74AUP1G09FX4-7 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G09FX4-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G09FX4-7 meets industry standards.

7.What is the process for return or replacement of 74AUP1G09FX4-7?

All 74AUP1G09FX4-7 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G09FX4-7, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G09FX4-7 part is unused and in its original packaging.

Return procedure for 74AUP1G09FX4-7:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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