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NXP Semiconductors 74AUP1G09GF,132
- Part No.:
- 74AUP1G09GF,132
- Manufacturer:
- NXP Semiconductors
- Category:
- Gates and Inverters
- Package:
- -
- Datasheet:
-
74AUP1G09GF,132.pdf
- Description:
- IC GATE AND
- Quantity:
- Payment:
- Shipping:
Inventory:104,450
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Product details
Overview
74AUP1G09GF,132 from Nexperia is a single 2-input AND gate with open-drain output and Schmitt-trigger inputs, designed for level-shifting, wired-AND bus interfacing, and I²C-compatible signal conditioning in ultra-low-power systems. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 25 °C, supports partial power-down via IOFF, and is rated for −40 °C to +125 °C ambient.
For engineers reviewing the 74AUP1G09GF,132 datasheet, 74AUP1G09GF,132 pinout, 74AUP1G09GF,132 application, or 74AUP1G09GF,132 equivalent, this device serves as a low-voltage logic combiner where input noise immunity, rail-to-rail compatibility, and power-down isolation are critical - especially in battery-powered sensor nodes and mixed-voltage microcontroller I/O expansion.
Technical Context
This device implements a single 2-input AND function with open-drain output, enabling wired-logic configurations and bidirectional bus driving. Its Schmitt-trigger inputs provide hysteresis (typ. 0.15 × VCC), tolerating slow-rising signals and suppressing noise on long traces or high-impedance lines.
The IOFF circuit actively disables output leakage when VCC = 0 V, limiting backflow current to ±0.75 μA over −40 °C to +125 °C. Input voltage tolerance extends to 3.6 V regardless of VCC, allowing safe interfacing with higher-voltage peripherals without external level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without translation. |
| Max ICC (Static) | 0.9 μA at 25 °C - ensures sub-1 μA quiescent draw in always-on monitoring circuits. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents damaging back-current during hot-swap or partial system power-down. |
| Input Hysteresis | Typ. 0.15 × VCC - rejects noise up to ~450 mV on 3 V rails, eliminating need for external RC filtering. |
| Propagation Delay | 0.9 ns (min) to 4.9 ns (max) at VCC = 3.0–3.6 V, CL = 5 pF - supports >100 MHz toggle rates in low-capacitance paths. |
| ESD Robustness | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without protection diodes. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial PLC, and outdoor IoT deployments. |
Pinout & Package
XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1.0 mm × 1.0 mm × 0.35 mm (SOT1202).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Data input | First AND operand; Schmitt-triggered, overvoltage-tolerant to 3.6 V independent of VCC. |
| B | Data input | Second AND operand; identical electrical behavior to Pin A; supports asynchronous logic gating. |
| GND | Ground reference | 0 V return path for all internal circuitry; must be low-impedance to maintain noise immunity. |
| n.c. | No connection | Internally unconnected terminal; left floating per design - no PCB trace or solder required. |
| VCC | Supply voltage | Primary power rail; powers internal logic and enables IOFF control; decoupling capacitor recommended. |
| Y | Open-drain output | AND result sink only; requires external pull-up to define HIGH level and drive strength. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8–3.6 V) | Eliminates need for separate voltage translators when interfacing 1.2 V FPGA I/O with 3.3 V sensors. |
| Schmitt-trigger inputs | Enables reliable operation with slow-edge signals (e.g., thermistor ADC outputs or mechanical switch debouncing). |
| IOFF partial power-down | Prevents back-current flow into powered subsystems during sleep mode - critical for ISO 26262-compliant shutdown sequences. |
| Overvoltage-tolerant inputs | Accepts 3.6 V inputs while VCC = 1.8 V, simplifying mixed-supply bus arbitration without external clamps. |
| Low dynamic power (CPD = 1.4 pF) | Reduces switching energy to <1 μW at 1 MHz, extending battery life in wearable health monitors. |
Applications
| Industrial Sensor Interface | I²C Bus Expansion |
|---|---|
|
Use Scenario: Connecting multiple analog temperature sensors with digital enable lines to a single microcontroller ADC channel. IC Role / Device Role / Timing Role: Logic-enabled signal routing gate; enables one sensor at a time by AND-ing its ready flag with MCU select pulse. Use Value: Reduces GPIO count by 50% versus discrete enable lines; Schmitt inputs reject EMI from nearby motor drives. |
Use Scenario: Adding a second I²C slave address space using address-line decoding on a crowded bus. IC Role / Device Role / Timing Role: Open-drain AND combiner for SDA/SCL arbitration; synchronizes peripheral readiness before ACK generation. Use Value: Enables dual-address mode without bus contention; IOFF isolates inactive segments during controller reset. |
| Low-Power Wearable Trigger | Automotive LIN Node Wake-Up |
|
Use Scenario: Detecting simultaneous motion (accelerometer) and heart-rate (PPG) activity to initiate BLE transmission. IC Role / Device Role / Timing Role: Dual-input wake-up trigger; outputs active-low pulse to MCU interrupt pin via pull-up. Use Value: Draws <1 μA static current - extends coin-cell lifetime beyond 12 months; hysteresis prevents false triggers from sensor noise. |
Use Scenario: Enabling LIN transceiver power-on only when both ignition signal and door-open status are asserted. IC Role / Device Role / Timing Role: Safety-critical enable gate; coordinates power sequencing between body controller and LIN node. Use Value: Meets ISO 11898-4 quiescent current limits (<10 μA); IOFF blocks reverse current if LIN VBAT drops before MCU VDD. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input AND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC1G09GW,125 | Higher ICC (max 4 μA), no Schmitt inputs, same open-drain output and 1.65–5.5 V VCC range. | Lacks noise immunity on slow edges; unsuitable for mechanical switch interfaces or long PCB traces. | Select when cost is primary and input signals are clean CMOS edges; avoid in noisy industrial environments. |
| SN74AUP1G09DBVR | Identical logic function and IOFF, but uses SOT-23-5 package (larger footprint, higher thermal resistance). | Less suitable for space-constrained wearables; thermal derating limits sustained 3.3 V operation above 85 °C. | Choose only if legacy SOT-23 assembly infrastructure exists; XSON6 offers 60% smaller area and better power density. |
Compared with 74LVC1G09GW,125 and SN74AUP1G09DBVR, the 74AUP1G09GF,132 uniquely balances ultra-low static power, Schmitt noise rejection, and miniature XSON6 packaging - making it optimal for next-generation edge nodes where size, battery life, and robustness are co-constrained.
Availability
74AUP1G09GF,132 is available at Aetrix Electronics and suitable for industrial sensor interface, I²C bus expansion, low-power wearable trigger, and automotive LIN node wake-up requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G09GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.
The 74AUP (Advanced Ultra Low Power) family targets battery-operated and thermally constrained systems, emphasizing sub-μA static current, wide VCC flexibility, and robust IO architecture for modern embedded designs.
FAQ
Can 74AUP1G09GF,132 drive a 10 kΩ pull-up to 5 V?
No. The output is open-drain and rated for VO ≤ 3.6 V maximum. Driving a 5 V pull-up risks exceeding the absolute maximum output voltage rating and may cause latch-up or permanent damage. Use only with pull-ups referenced to VCC or ≤3.6 V.
Does the IOFF feature work when VCC is disconnected but GND remains connected?
Yes. IOFF activates when VCC = 0 V, regardless of GND continuity. Output leakage is limited to ±0.75 μA over −40 °C to +125 °C, preventing back-current into powered downstream circuits even with GND tied.
What is the minimum recommended pull-up resistor for Y at 3.3 V VCC?
For 4 mA sink capability (per VOL spec), RPULLUP ≤ (3.3 V − 0.5 V) / 4 mA = 700 Ω. However, typical I²C or GPIO use employs 2.2 kΩ–10 kΩ to limit current and reduce dynamic power; verify timing meets tpd + rise-time budget.
Is the n.c. pin on SOT1202 (XSON6) electrically isolated or internally bonded?
The n.c. pin is fully unconnected - no internal bond wire, no silicon connection. It is a mechanical placeholder for package symmetry and must remain unconnected on PCB; soldering or routing to it violates the datasheet and risks shorting adjacent terminals.
74AUP1G09GF,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- *
- Package/Case:
- -
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- -
- Number of Circuits:
- -
- Number of Inputs:
- -
- Features:
- -
- Voltage - Supply:
- -
- Current - Quiescent (Max):
- -
- Current - Output High, Low:
- -
- Input Logic Level - Low:
- -
- Input Logic Level - High:
- -
- Max Propagation Delay @ V, Max CL:
- -
- Operating Temperature:
- -
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- -
- Supplier Device Package:
- -
74AUP1G09GF,132 FAQ
1.How can I place an order for 74AUP1G09GF,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G09GF,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G09GF,132 reliable?
The price and inventory of 74AUP1G09GF,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G09GF,132 is usually 5 days.
3.What payment methods are accepted for 74AUP1G09GF,132?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G09GF,132 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G09GF,132?
74AUP1G09GF,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G09GF,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G09GF,132?
For technical support, including 74AUP1G09GF,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G09GF,132 requirements.
6.How does Aetrix verify that 74AUP1G09GF,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G09GF,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G09GF,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1G09GF,132?
All 74AUP1G09GF,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G09GF,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G09GF,132 part is unused and in its original packaging.
Return procedure for 74AUP1G09GF,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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