Nexperia USA Inc. 74AUP1G125GS,132
- Part No.:
- 74AUP1G125GS,132
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G125GS,132.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:1,682
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Product details
Overview
74AUP1G125GS,132 from Nexperia is a single low-power 3-state buffer/line driver with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply range. It delivers ultra-low static current (≤1.4 μA at −40 °C to +125 °C), supports partial power-down via IOFF, and ensures robust noise immunity in space-constrained IoT sensor interfaces and battery-powered wearables.
For engineers reviewing the 74AUP1G125GS,132 datasheet, 74AUP1G125GS,132 pinout, 74AUP1G125GS,132 application, or 74AUP1G125GS,132 equivalent, key selection criteria include its 6-terminal XSON6 package (SOT1202), guaranteed 3.1 ns propagation delay at 3.0 V, IOFF-enabled backflow prevention, and −40 °C to +125 °C industrial temperature rating.
Technical Context
The device implements a non-inverting buffer with active-low 3-state output control (OE), where input transitions are hardened by Schmitt-trigger action-enabling reliable operation with slow-rising signals up to 200 ns/V. Its IOFF circuit actively disables outputs during VCC = 0 V, blocking damaging backflow currents in mixed-voltage or hot-swap systems.
All I/O pins tolerate 3.6 V regardless of VCC level, and input-disable functionality allows safe floating-input conditions. The logic is fully specified for partial power-down applications per JEDEC JESD78 Class II latch-up performance (>100 mA) and ESD robustness (HBM >5000 V, CDM >1000 V).
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC (VCC = 0.8–3.6 V) | 1.4 μA at −40 °C to +125 °C - ensures <1 μW static power at 1.8 V, critical for always-on sensor nodes |
| Propagation Delay (CL = 5 pF, VCC = 3.0 V) | 3.1 ns max - supports >100 MHz data rates in high-speed serial bus fanout applications |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents >100 μA backflow into powered-down subsystems, protecting downstream ICs |
| Input Voltage Tolerance | Up to 3.6 V on all inputs - allows interfacing with higher-voltage peripherals while VCC = 1.2 V |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial motor control, and outdoor edge devices |
| ESD Protection | HBM >5000 V, CDM >1000 V - exceeds IEC 61000-4-2 Level 4 for system-level surge resilience |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT1202); no leads; 6 terminals; body dimensions 1.0 mm × 1.0 mm × 0.35 mm; thermal-enhanced construction for high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (OE) | Output enable input (active-low) | Drives Y to high-impedance when LOW; enables output buffer when HIGH; accepts 3.6 V regardless of VCC |
| 2 (A) | Data input | Schmitt-trigger input ensures clean switching with slow edges; supports 0.8–3.6 V logic thresholds |
| 3 (GND) | Ground reference (0 V) | Reference node for all voltage measurements and ESD discharge path; must be low-inductance connection |
| 4 (Y) | Buffered data output | Non-inverting 3-state output; drives loads up to ±20 mA; low overshoot/undershoot (<10 % VCC) |
| 5 (n.c.) | No-connect terminal | Internally unconnected; must remain unbonded and unconnected on PCB to avoid parasitic coupling |
| 6 (VCC) | Positive supply rail | Power input for core logic; IOFF remains active even when VCC = 0 V; decoupling capacitor required |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA over full temperature range - extends battery life in coin-cell-powered BLE sensors |
| IOFF partial power-down | Blocks backflow current when VCC = 0 V - enables safe hot-plug of peripheral modules in modular systems |
| Schmitt-trigger inputs | Hysteresis ≥ 0.3 V at 1.8 V - eliminates chatter on noisy or long-trace GPIO lines in industrial enclosures |
| Wide VCC compatibility | Operates from 0.8 V to 3.6 V - eliminates need for external regulators in multi-rail SoC designs |
| High noise immunity | Input noise margin >35 % VCC - rejects conducted EMI in motor-drive adjacent PCB zones |
Applications
| Industrial Sensor Interface | Low-Power Wearable Hub |
|---|---|
|
Use Scenario: Connecting analog sensor outputs to an ultra-low-power MCU ADC input with shared I²C bus lines. IC Role / Device Role / Timing Role: Signal conditioning buffer isolating sensitive ADC inputs from digital noise on shared traces. Use Value: Schmitt-trigger input rejects sub-100 mV noise spikes; 1.4 μA ICC minimizes quiescent drain on CR2032 battery. |
Use Scenario: Enabling/disabling LED driver and accelerometer data paths in a fitness tracker during sleep mode. IC Role / Device Role / Timing Role: 3-state gate controlling signal routing between subsystems under MCU GPIO control. Use Value: IOFF blocks leakage when MCU VDD drops to 0 V during deep sleep, preserving charge in backup capacitors. |
| Automotive Body Control Module | Smart Home Edge Node |
|
Use Scenario: Level-shifting and buffering LIN bus wake-up signals to a 1.2 V domain microcontroller. IC Role / Device Role / Timing Role: Input translator and noise filter for low-voltage MCU GPIO monitoring LIN transceiver status. Use Value: 3.6 V-tolerant A pin accepts LIN bus voltage directly; −40 °C to +125 °C rating meets AEC-Q100 Grade 1 requirements. |
Use Scenario: Isolating Zigbee radio SPI lines from a 3.3 V host processor during firmware updates. IC Role / Device Role / Timing Role: Bidirectional bus buffer enabling safe hot-reconfiguration without bus contention. Use Value: 3.1 ns tpd ensures timing compliance with 20 MHz SPI clock; n.c. pin simplifies layout in 1.0 mm pitch QFN footprint. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer/line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G125DBVR | Higher ICC (10 μA typ), wider VCC (1.65–5.5 V), no IOFF, SOT-23-5 package | Lacks power-down protection; unsuitable for mixed-voltage hot-swap systems | Select only if 5 V tolerance is required and IOFF is not needed |
| 74LVC1G125GW,125 | Same family but TSSOP5 (SOT353-1) package; 5-pin, 1.25 mm body width; identical electrical specs | Requires larger PCB area; less suitable for ultra-dense wearable layouts | Choose when hand-soldering or legacy board compatibility is prioritized over miniaturization |
Compared with SN74LVC1G125DBVR and 74LVC1G125GW,125, the 74AUP1G125GS,132 uniquely combines sub-μA static current, IOFF-enabled backflow blocking, and 1.0 mm × 1.0 mm XSON6 packaging-making it optimal for battery-critical, thermally constrained, and mixed-rail embedded systems.
Availability
74AUP1G125GS,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, low-power wearable hubs, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G125GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable discrete, logic, and MOSFET solutions optimized for efficiency and miniaturization in consumer, industrial, and automotive markets.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-sensitive applications demanding nanowatt static power, wide VCC flexibility, and robust IO behavior-designed specifically for battery-operated and thermally constrained edge devices.
FAQ
What is the maximum load capacitance supported at 3.0 V supply?
The 74AUP1G125GS,132 is characterized up to 30 pF load capacitance (CL) at VCC = 3.0 V, with propagation delay increasing from 3.1 ns (CL = 5 pF) to 8.3 ns (CL = 30 pF). Output drive strength remains stable within ±20 mA limits, and overshoot stays below 10 % of VCC across this range.
Does the OE pin require a pull-up resistor in 3-state disabled operation?
No external pull-up is required: OE is internally biased and functions correctly with direct MCU GPIO control. When OE is driven LOW, Y enters high-impedance state with IOZ ≤ ±0.75 μA; floating OE is not recommended due to undefined output state and potential shoot-through risk.
Can the 74AUP1G125GS,132 interface between 1.2 V and 3.3 V logic domains?
Yes: the A and Y pins tolerate up to 3.6 V regardless of VCC level, and VIH/VIL thresholds scale with VCC (e.g., VIH = 0.70 × VCC min at 0.8 V). With VCC = 1.2 V, it reliably accepts 3.3 V inputs and drives 3.3 V-tolerant receivers without external level shifters.
How does IOFF behave when VCC is ramping during power-up?
IOFF activates automatically when VCC falls below ~0.2 V and remains active until VCC rises above ~0.4 V. During this transition, output leakage is limited to ±0.75 μA, preventing backflow into partially powered subsystems-a key requirement for sequenced power architectures in industrial PLCs.
74AUP1G125GS,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT1202 (1x1)
74AUP1G125GS,132 FAQ
1.How can I place an order for 74AUP1G125GS,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G125GS,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G125GS,132 reliable?
The price and inventory of 74AUP1G125GS,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G125GS,132 is usually 5 days.
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5.How can I obtain technical support or documentation for 74AUP1G125GS,132?
For technical support, including 74AUP1G125GS,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G125GS,132 requirements.
6.How does Aetrix verify that 74AUP1G125GS,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G125GS,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G125GS,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1G125GS,132?
All 74AUP1G125GS,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G125GS,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G125GS,132 part is unused and in its original packaging.
Return procedure for 74AUP1G125GS,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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