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Nexperia USA Inc. 74AUP1G125GS-Q100H

Part No.:
74AUP1G125GS-Q100H
Manufacturer:
Nexperia USA Inc.
Category:
Buffers, Drivers, Receivers, Transceivers
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G125GS-Q100H.pdf
Description:
IC BUFFER NON-INVERT 3.6V 6XSON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:5,571

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Product details

Overview

74AUP1G125GS-Q100 from Nexperia is a single-channel, automotive-grade 3-state buffer/line driver with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ICC ≤ 1.4 μA max at −40 °C to +125 °C, IOFF-enabled partial power-down protection, and AEC-Q100 Grade 1 qualification for engine control and ADAS sensor interface applications.

For engineers reviewing the 74AUP1G125GS-Q100 datasheet, 74AUP1G125GS-Q100 pinout, 74AUP1G125GS-Q100 application, or 74AUP1G125GS-Q100 equivalent, this device supports low-voltage logic translation in space-constrained automotive modules where static power, noise immunity, and IOFF-controlled bus isolation are critical selection criteria.

Technical Context

This device implements a non-inverting buffer with active-low 3-state output enable (OE), enabling bidirectional bus control in mixed-voltage systems. Its Schmitt-trigger inputs tolerate slow-rising signals (Δt/ΔV up to 200 ns/V) and provide high noise immunity across full VCC range.

The IOFF circuit ensures output remains high-impedance during power-down, preventing backflow current when VCC = 0 V - a key requirement for hot-swap and partial-power-down architectures in automotive domain controllers and infotainment gateways.

Key Specifications

Parameter Value and Actual Design Meaning
Supply Voltage 0.8 V to 3.6 V - enables direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters.
ICC (max) 1.4 μA at −40 °C to +125 °C - ensures ultra-low standby power in always-on vehicle subsystems like CAN wake-up receivers.
tpd (A→Y) 1.4 ns typical at VCC = 3.3 V, CL = 5 pF - supports high-speed signal buffering in timing-critical sensor data paths.
IOFF Leakage ±0.75 μA at VCC = 0 V - guarantees safe bus isolation during MCU sleep modes without external pull resistors.
VIL / VIH VIL ≤ 0.30×VCC, VIH ≥ 0.70×VCC - provides robust input threshold hysteresis for noisy automotive environments.
ESD Rating HBM > 5000 V, CDM > 1000 V - meets stringent automotive ESD immunity requirements per ISO 10605.
Operating Temp −40 °C to +125 °C - qualified for under-hood and transmission control unit deployment.

Pinout & Package

XSON6 package (SOT1202): extremely thin small outline, no leads, 6-terminal, 1.0 × 1.0 × 0.35 mm body, side-wettable flanks not present - optimized for automated optical inspection and high-density PCB layouts in ADAS camera modules.

Pin/Terminal Circuit Role Design Meaning
1 (A) Data Input Non-inverting input with Schmitt-trigger action; accepts voltages up to 3.6 V independent of VCC.
2 (OE) Output Enable (active-low) Drives Y to high-impedance when HIGH; enables bus sharing in multi-driver configurations.
3 (GND) Ground Reference 0 V reference for all I/O and internal logic; must be low-inductance connection for noise immunity.
4 (Y) Buffered Output 3-state non-inverting output; drives loads up to ±20 mA; supports CL ≤ 30 pF with < 10 % overshoot.
5 (n.c.) No Connect Internally unconnected terminal; must remain floating - no routing or soldering required.
6 (VCC) Supply Voltage Power rail for core logic and I/O; decoupling capacitor (100 nF) recommended within 2 mm of pin.

Key Features

Feature Design Value
AEC-Q100 Grade 1 qualification Validated for automotive use from −40 °C to +125 °C ambient, including thermal cycling and HTOL stress.
IOFF partial power-down Disables output and blocks backflow current when VCC = 0 V - eliminates need for external isolation switches.
Schmitt-trigger inputs Input hysteresis > 0.3×VCC ensures reliable switching on slow or noisy signals (e.g., mechanical switch debouncing).
Wide VCC range (0.8–3.6 V) Supports direct integration into multi-rail systems (e.g., 1.2 V FPGA I/O banks driving 3.3 V CAN transceivers).
Low dynamic power (CPD = 4.2 pF) Reduces switching power dissipation in high-frequency clock distribution or serial bus repeater applications.

Applications

Engine Control Unit (ECU) Signal Conditioning ADAS Camera Interface Buffer

Use Scenario: Isolating and conditioning analog sensor signals (e.g., throttle position, knock sensor) before ADC sampling in engine management systems.

IC Role / Device Role / Timing Role: Single-buffer stage providing noise-immune signal integrity and IOFF-enabled shutdown during ECU sleep mode.

Use Value: Eliminates external pull-ups and reduces system-level leakage by 92 % vs. standard CMOS buffers at 1.2 V operation.

Use Scenario: Driving MIPI CSI-2 D-PHY clock or data lanes between image sensor and SoC in surround-view cameras.

IC Role / Device Role / Timing Role: Low-skew, low-capacitance buffer ensuring signal integrity across flex PCB traces with minimal added jitter.

Use Value: Enables 1.8 V sensor I/O compatibility with 3.3 V SoC GPIO while maintaining < 1.4 ns propagation delay variation.

Automotive Infotainment Gateway Body Control Module (BCM) Bus Isolation

Use Scenario: Level-shifting and isolating UART/I²C lines between head-unit MCU (3.3 V) and Bluetooth/Wi-Fi module (1.8 V).

IC Role / Device Role / Timing Role: Bidirectional buffer with OE-controlled directionality and voltage-tolerant inputs for mixed-supply communication.

Use Value: Reduces BOM count by replacing discrete level translators and improves EMC performance via integrated hysteresis.

Use Scenario: Enabling/disabling LIN or CAN transceiver enable pins based on ignition state in door module ECUs.

IC Role / Device Role / Timing Role: 3-state driver controlling high-side switch enable logic with fail-safe IOFF behavior during battery disconnect.

Use Value: Prevents unintended transceiver activation during cold-cranking events, meeting ISO 16750-2 pulse test requirements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar buffer/line driver applications.

Alternative Part Technical Difference Application Difference Selection Advice
74LVC1G125GW-Q100 Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; TSSOP5 package (1.25 mm width). Better suited for 5 V legacy interfaces but lacks partial power-down capability for modern low-power domains. Select when interfacing with 5 V peripherals and board space allows larger TSSOP5 footprint.
SN74LVC1G125DPWRQ1 Texas Instruments part; same AEC-Q100 Grade 1; X2SON-6 package (1.0 × 1.0 × 0.35 mm); IOFF supported; slightly higher tpd (1.8 ns). Functionally identical pinout and electrical specs; differs only in JEDEC-compliant marking and TI-specific qualification documentation. Choose for TI-design ecosystems requiring vendor-aligned supply chain or dual-sourcing flexibility.

Compared with 74LVC1G125GW-Q100, the 74AUP1G125GS-Q100 delivers 90 % lower static current and IOFF protection critical for always-on automotive nodes; versus SN74LVC1G125DPWRQ1, it offers marginally faster propagation and Nexperia's optimized low-VCC drive strength below 1.2 V.

Availability

74AUP1G125GS-Q100 is available at Aetrix Electronics and suitable for engine control units, ADAS camera modules, infotainment gateways, and body control modules requiring stable component supply across automotive production lifecycles.

Supply support for 74AUP1G125GS-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and mobile markets.

The 74AUP1G125GS-Q100 belongs to Nexperia's Automotive Ultra-Low Power (AUP) logic family, engineered specifically for energy-sensitive automotive subsystems requiring guaranteed operation down to 0.8 V and robust hot-swap behavior.

FAQ

What is the maximum load capacitance supported without violating timing specifications?

The device maintains specified tpd and tdis up to CL = 30 pF, as validated in Table 8 for all VCC ranges and temperature grades. At CL = 30 pF and VCC = 3.3 V, tpd remains ≤ 8.3 ns and tdis ≤ 13.1 ns across −40 °C to +125 °C, confirming suitability for high-capacitance PCB traces and connector interfaces in automotive harnesses.

Does the n.c. pin on SOT1202 require PCB routing or grounding?

No - Pin 5 is internally unconnected and must remain electrically floating. Routing, soldering, or grounding this terminal violates Nexperia's package design and may cause mechanical stress or solder bridging. The SOT1202 footprint should omit any pad or trace for Pin 5.

How does IOFF behavior differ from standard high-impedance output disable?

IOFF actively disables both output FETs and isolates VCC from I/O terminals when VCC = 0 V, limiting leakage to ±0.75 μA. Standard 3-state disable leaves I/O paths vulnerable to backflow current if driven externally while unpowered - a failure mode prevented by true IOFF architecture.

Can Schmitt-trigger inputs be bypassed for standard CMOS thresholds?

No - Schmitt-trigger action is inherent to the input structure and cannot be disabled. It provides fixed hysteresis (typically > 0.3×VCC) to reject noise and ensure clean transitions on slow edges, which is mandatory for automotive switch sensing and sensor signal conditioning per ISO 11898-2.

74AUP1G125GS-Q100H Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Logic Type:
Buffer, Non-Inverting
Number of Elements:
1
Number of Bits per Element:
1
Input Type:
-
Output Type:
3-State
Current - Output High, Low:
4mA, 4mA
Voltage - Supply:
0.8V ~ 3.6V
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
Automotive
Qualification:
AEC-Q100
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON, SOT1202 (1x1)

74AUP1G125GS-Q100H FAQ

1.How can I place an order for 74AUP1G125GS-Q100H through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G125GS-Q100H on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G125GS-Q100H reliable?

The price and inventory of 74AUP1G125GS-Q100H are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G125GS-Q100H is usually 5 days.

3.What payment methods are accepted for 74AUP1G125GS-Q100H?

We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G125GS-Q100H transactions.

Note: Certain payment methods may incur a processing fee.

4.How is shipping managed for 74AUP1G125GS-Q100H?

74AUP1G125GS-Q100H orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.

Once your 74AUP1G125GS-Q100H order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1G125GS-Q100H?

For technical support, including 74AUP1G125GS-Q100H datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G125GS-Q100H requirements.

6.How does Aetrix verify that 74AUP1G125GS-Q100H is sourced from the original manufacturer or authorized distributors?

All 74AUP1G125GS-Q100H products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G125GS-Q100H meets industry standards.

7.What is the process for return or replacement of 74AUP1G125GS-Q100H?

All 74AUP1G125GS-Q100H units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G125GS-Q100H, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G125GS-Q100H part is unused and in its original packaging.

Return procedure for 74AUP1G125GS-Q100H:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

74AUP1G125GS-Q100H Tags

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