Nexperia USA Inc. 74AUP1G125GW,125
- Part No.:
- 74AUP1G125GW,125
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G125GW,125.pdf
- Description:
- IC BUF NON-INVERT 3.6V 5TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:4,460
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Product details
Overview
74AUP1G125GW,125 from Nexperia is a single low-power 3-state buffer/line driver with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply range. It delivers ultra-low static ICC ≤ 1.4 μA (max at −40 °C to +125 °C), supports partial power-down via IOFF circuitry, and ensures robust noise immunity in space-constrained I/O expansion applications such as portable sensor interfaces and battery-powered microcontroller peripheral buffering.
For engineers reviewing the 74AUP1G125GW,125 datasheet, 74AUP1G125GW,125 pinout, 74AUP1G125GW,125 application, or 74AUP1G125GW,125 equivalent, key selection criteria include its 5-pin TSSOP5 package, guaranteed 3-state output disable behavior under VCC = 0 V, sub-10 ns propagation delay at 3.0 V (CL = 5 pF), and JEDEC-compliant voltage thresholds across multiple VCC ranges.
Technical Context
This device implements a non-inverting buffer with active-low 3-state enable (OE), where input transitions are conditioned by Schmitt-trigger action to tolerate slow-rising/falling signals without oscillation. The IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V while inputs/outputs remain biased up to 3.6 V.
It complies with five JEDEC standards (JESD8-12 through JESD8-B) for multi-voltage system interoperability and meets Class II latch-up performance (>100 mA). Input leakage remains ≤ ±0.75 μA over full temperature range, and output drive capability is specified at ±4.0 mA (VOH/VOL) at VCC = 3.0 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max ICC (Static) | 1.4 μA at −40 °C to +125 °C - ensures negligible quiescent power draw in always-on battery monitoring circuits |
| tpd (A→Y) | 1.2 ns min / 4.4 ns max at VCC = 3.0–3.6 V, CL = 5 pF - supports high-speed data routing in compact MCU GPIO expanders |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents damaging back-current during hot-swap or partial system shutdown |
| VIL/VIH Thresholds | VIL ≤ 0.30×VCC (min), VIH ≥ 0.70×VCC (min) - provides >40% noise margin at 1.2 V operation |
| Operating Temperature | −40 °C to +125 °C - qualified for automotive body control modules and industrial motor drive I/O stages |
| ESD Protection | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without external protection |
Pinout & Package
TSSOP5 (SOT353-1) package: plastic thin shrink small outline, 5-lead, 1.25 mm body width, 0.65 mm lead pitch, 0.3 mm max height.
| Pin | Circuit Role | Design Meaning |
|---|---|---|
| 1 | OE (Output Enable) | Active-low control input; drives Y to high-impedance when logic HIGH, enabling bus sharing |
| 2 | A (Data Input) | Non-inverting input with Schmitt-trigger threshold; accepts 0–3.6 V regardless of VCC |
| 3 | GND | Ground reference for all internal circuitry and output stage; must be low-impedance |
| 4 | Y (Data Output) | 3-state buffered output; sinks/sourcing up to ±4.0 mA at VCC = 3.0 V |
| 5 | VCC | Primary supply rail; powers internal logic and output driver; supports dynamic voltage scaling |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables reliable signal conditioning of slow or noisy GPIO lines without external hysteresis components |
| IOFF partial power-down | Guarantees output isolation and zero back-current when VCC = 0 V, critical for hot-plug systems |
| Multi-standard voltage compliance | Meets JESD8-12 through JESD8-B - simplifies design reuse across 0.8–3.6 V SoC platforms |
| Ultra-low dynamic capacitance | CI = 0.9 pF, CO = 1.5–1.7 pF - minimizes loading on high-speed clock/data traces in dense layouts |
| Wide temperature qualification | Specified from −40 °C to +125 °C - suitable for under-hood automotive and industrial edge nodes |
Applications
| Industrial Sensor Interface | Portable MCU GPIO Expansion |
|---|---|
Use Scenario: Interfacing analog sensor outputs to an ultra-low-power microcontroller with limited GPIO count. IC Role / Device Role / Timing Role: Buffering and isolating sensor signals while enabling/disabling connection via OE to reduce system standby current. Use Value: Enables 0.8 V–3.3 V sensor-to-MCU compatibility with <1.4 μA static draw, extending battery life in wireless nodes. | Use Scenario: Expanding I²C or SPI peripheral count on a space-constrained wearable controller PCB. IC Role / Device Role / Timing Role: Acting as a 3-state bus buffer to prevent contention between shared SDA/SCL lines and local peripherals. Use Value: Delivers <4.4 ns tpd at 3.3 V and 5 pF load, preserving timing margins in 400 kHz I²C systems. |
| Automotive Body Control Module | Low-Power Industrial PLC I/O Stage |
Use Scenario: Driving discrete LED indicators or small relays from a 12 V system's 3.3 V domain via level-shifted control lines. IC Role / Device Role / Timing Role: Providing robust, noise-immune buffering between MCU GPIO and external loads with fail-safe 3-state disable. Use Value: Schmitt-trigger inputs reject EMI from adjacent solenoid drivers; IOFF prevents backfeed during ignition cycling. | Use Scenario: Isolating field-side digital inputs from a programmable logic controller's internal 1.8 V FPGA core. IC Role / Device Role / Timing Role: Level-translating and buffering 24 V dry-contact signals down to 1.8 V logic while maintaining galvanic separation. Use Value: Accepts up to 3.6 V inputs at any VCC ≥ 0.8 V, eliminating need for external clamping diodes or resistors. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer/line driver applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G125DBVR | Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; no Schmitt inputs | Requires ≥1.65 V supply; unsuitable for partial power-down or sub-1 V systems | Select when interfacing to 5 V legacy peripherals and IOFF is not required |
| 74LVC1G125GW,125 | Same TSSOP5 package; VCC = 1.65–5.5 V; ICC = 10 μA max; no IOFF; standard CMOS inputs | Lacks Schmitt-trigger noise immunity and true 0 V power-down capability | Prefer for cost-sensitive 3.3 V-only designs where input slew rate is controlled |
Compared with SN74LVC1G125DBVR and 74LVC1G125GW,125, the 74AUP1G125GW,125 uniquely supports sub-1 V operation, guarantees IOFF back-current prevention, and provides Schmitt-trigger noise rejection-making it the only choice for battery-critical, mixed-voltage, or EMI-prone environments.
Availability
74AUP1G125GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable MCU GPIO expansion, automotive body control modules, and low-power industrial PLC I/O stages requiring stable component supply across extended temperature and voltage ranges.
Supply support for 74AUP1G125GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for reliability and energy efficiency.
The 74AUP (Advanced Ultra Low Power) product line targets battery-operated and thermally constrained applications, emphasizing sub-1 V operation, nanoamp ICC, and robust IOFF behavior for modern embedded and automotive systems.
FAQ
What is the maximum allowable input voltage when VCC = 0 V?
The 74AUP1G125GW,125 allows input voltages up to 3.6 V regardless of VCC state, including VCC = 0 V. This is enabled by its IOFF circuitry and input protection structure, permitting safe "live" signal injection during power-down sequences without damage or back-current flow.
Does this device support true 0.8 V logic operation with guaranteed timing?
Yes - propagation delay is fully characterized down to 0.8 V (tpd ≤ 20.6 ns at CL = 5 pF, Tamb = 25 °C), and input thresholds scale with VCC (VIH ≥ 0.75×VCC, VIL ≤ 0.25×VCC at −40 °C to +125 °C), ensuring functional correctness and timing predictability across the entire 0.8–3.6 V range.
How does the Schmitt-trigger input improve system robustness?
The Schmitt-trigger input provides hysteresis (typically >150 mV at 1.2 V), rejecting noise and contact bounce on slow-rising signals such as mechanical switch closures or long PCB traces. This eliminates need for external RC filters or software debouncing in sensor and control interface applications.
Can the 74AUP1G125GW,125 be used in hot-swap applications?
Yes - its IOFF feature actively disables the output stage when VCC = 0 V, preventing back-current from powered downstream circuits into the unpowered IC. Combined with 3.6 V-tolerant inputs and HBM >5000 V ESD rating, it is qualified for controlled hot-swap insertion in modular industrial and telecom systems.
74AUP1G125GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- 3-State
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G125GW,125 FAQ
1.How can I place an order for 74AUP1G125GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G125GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G125GW,125 reliable?
The price and inventory of 74AUP1G125GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G125GW,125 is usually 5 days.
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Once your 74AUP1G125GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G125GW,125?
For technical support, including 74AUP1G125GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G125GW,125 requirements.
6.How does Aetrix verify that 74AUP1G125GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G125GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G125GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G125GW,125?
All 74AUP1G125GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G125GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G125GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G125GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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