Diodes Incorporated 74AUP1G126FZ4-7

Overview

74AUP1G126FZ4-7 from Diodes Incorporated is a single non-inverting buffer gate with 3-state output, designed for ultra-low-power portable systems operating from 0.8V to 3.6V. It delivers ±4mA drive at 3.0V, features IOFF partial power-down protection, and uses Schmitt-trigger inputs (250mV hysteresis at 3.0V) for robust noise immunity in battery-powered interfaces.

For engineers reviewing the 74AUP1G126FZ4-7 datasheet, 74AUP1G126FZ4-7 pinout, 74AUP1G126FZ4-7 application, or 74AUP1G126FZ4-7 equivalent, this device is selected for voltage-level translation, bus isolation, and low-quiescent-current signal buffering in space-constrained mobile peripherals where supply rail flexibility and power-down safety are critical.

Technical Context

This Advanced Ultra Low Power (AUP) CMOS logic device implements a single-channel non-inverting buffer with active-high output enable (OE), entering high-impedance state when OE = LOW. Its IOFF circuit disables outputs during partial power-down, preventing backflow current between powered and unpowered system domains.

The input stage integrates Schmitt-trigger action (250mV typical hysteresis at VCC = 3.0V), enabling reliable operation with slow-rising/falling signals. Propagation delay is 1.4ns typical (3.3V, CL = 5pF), and enable/disable times are 1.2ns/1.2ns (3.3V), supporting high-speed control of data buses in mixed-voltage SoC interconnects.

Key Specifications

Pinout & Package

X2-DFN1410-6 package: 1.4mm × 1.0mm × 0.4mm body, 0.5mm pad pitch, bottom-side thermal pad, no leads, RoHS-compliant matte tin finish.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-state buffer applications.

Compared with SN74LVC1G126DBVR and 74LVC1G125GW,125, the 74AUP1G126FZ4-7 uniquely combines sub-1V operation, IOFF protection, and ultra-low ICC - making it the sole option for energy-harvesting sensors and always-on wearables requiring fail-safe power-domain isolation.

Availability

74AUP1G126FZ4-7 is available at Aetrix Electronics and suitable for mobile display interface, USB OTG control logic, wearable sensor hub, and low-power audio codec interface applications requiring stable component supply across extended product lifecycles.

Supply support for 74AUP1G126FZ4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-reliability, low-power solutions for consumer, industrial, and automotive markets.

The 74AUP logic family targets ultra-low-power portable electronics, delivering sub-1µA static current and wide-VCC operation to extend battery life in space-constrained devices like earbuds, fitness trackers, and IoT edge nodes.

FAQ

What is the minimum supply voltage for guaranteed operation?

The 74AUP1G126FZ4-7 is fully specified down to 0.8V VCC, with VIH/VIL thresholds scaling proportionally (e.g., VIH = 0.80 × VCC). At 0.8V, propagation delay increases to 20.6ns (CL = 5pF), and output drive drops to ±20µA - sufficient for low-speed control signaling in energy-harvesting systems.

How does IOFF protect during partial power-down?

When VCC = 0V, the IOFF circuit actively disables both input and output buffers, limiting leakage to ±0.5µA even if OE or A pins are biased to 3.6V. This prevents reverse current flow into the unpowered die, protecting downstream components and avoiding latch-up in mixed-rail systems.

Can this device replace a standard 74HC1G126?

No - the 74AUP1G126FZ4-7 operates down to 0.8V and draws <0.9µA ICC, whereas 74HC1G126 requires ≥2V and consumes >1µA at 2V. Substituting would cause functional failure below 2V and violate timing specs due to different propagation characteristics and Schmitt thresholds.

Is the thermal pad electrically connected internally?

Yes - the exposed thermal pad (Pin 6) is internally connected to GND. It must be soldered to a PCB ground plane using a 1.0mm × 0.8mm thermal relief pattern to achieve the rated θJA of 460°C/W and prevent thermal runaway during sustained 4mA output loading.