NXP Semiconductors 74AUP1G14GF,132

Overview

74AUP1G14GF,132 from Nexperia is a single low-power Schmitt-trigger inverter IC designed for signal conditioning in ultra-low-voltage digital systems. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 25 °C, features IOFF partial power-down protection, and supports −40 °C to +125 °C operation in SOT891 (XSON6) package. It is used in waveform shaping and relaxation oscillator circuits.

For engineers reviewing the 74AUP1G14GF,132 datasheet, 74AUP1G14GF,132 pinout, 74AUP1G14GF,132 application, or 74AUP1G14GF,132 equivalent, key selection criteria include Schmitt-trigger hysteresis (0.79–1.31 V at VCC = 3.0 V), propagation delay as low as 1.5 ns (VCC = 3.0 V, CL = 5 pF), IOFF leakage ≤±0.75 μA, and compatibility with JEDEC standards JESD8-12 through JESD8C.

Technical Context

This device implements a single-channel CMOS inverter with asymmetric Schmitt-trigger input thresholds (VT+ = 1.88–2.32 V, VT− = 0.88–1.24 V at VCC = 3.0 V), enabling robust noise immunity in slow-rising or noisy signal environments. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

The logic function is strictly inverting (A → Y), with static output levels VOH ≥ 2.30 V and VOL ≤ 0.50 V under full load (IO = ±4.0 mA, VCC = 3.0 V). Dynamic performance is characterized by load-dependent propagation delay (1.5–7.4 ns across CL = 5–30 pF and VCC = 0.8–3.6 V) and low dynamic power dissipation via CPD = 4.3 pF (VCC = 3.0–3.6 V).

Key Specifications

Pinout & Package

XSON6 package (SOT891), 1.1 mm × 1.45 mm × 0.5 mm body, 6-terminal no-lead surface-mount construction with wettable flank option.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar Schmitt-trigger inverter applications.

Compared with SN74LVC1G14DBVR and 74LVC1G14GW,125, the 74AUP1G14GF,132 uniquely supports sub-1 V operation, offers the lowest ICC (<1.4 μA), includes IOFF for system-level power management, and delivers the highest hysteresis (up to 1.31 V), making it optimal for battery-powered industrial sensors and automotive body electronics.

Availability

74AUP1G14GF,132 is available at Aetrix Electronics and suitable for waveform shaping, relaxation oscillator design, astable multivibrator implementation, and monostable pulse generation requiring stable component supply across automotive, industrial sensing, and portable medical device programs.

Supply support for 74AUP1G14GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable, and energy-efficient components for automotive, industrial, computing, consumer, and communications markets.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power digital signal conditioning in battery-operated and thermally constrained systems, emphasizing sub-1 V operation, nanowatt static consumption, and robust noise immunity.

FAQ

What is the maximum input voltage the 74AUP1G14GF,132 can tolerate when VCC = 0 V?

The device tolerates input voltages up to 3.6 V absolute maximum-even with VCC = 0 V-due to overvoltage-tolerant input structures. This allows safe connection to powered upstream logic in partial-power-down scenarios without risk of latch-up or damage, as confirmed in Table 5 (VI input voltage limit) and Section 2 features.

How does the IOFF feature behave during power sequencing?

When VCC drops below ~0.2 V, the IOFF circuit automatically disables the output driver, limiting output leakage to ±0.75 μA. This prevents back-driving of powered downstream logic and eliminates bus contention during staggered power-up/down sequences, as specified in Table 7 (IOFF and ΔIOFF parameters) and Section 1.

Can the 74AUP1G14GF,132 drive a 50 pF load reliably?

No-the datasheet characterizes propagation delay only up to CL = 30 pF. At CL = 50 pF, tpd increases beyond guaranteed limits (e.g., >10 ns at VCC = 3.0 V), and output rise/fall times degrade. For 50 pF loads, use a buffer stage or select a higher-drive variant like 74AUP2G14.

Is the SOT891 (XSON6) package compatible with standard reflow profiles?

Yes-the SOT891 package is qualified for IPC/JEDEC J-STD-020D moisture sensitivity level 1 and supports standard lead-free reflow profiles (peak 260 °C, 10 s max). Its 0.5 mm profile and wettable flanks enable automated optical inspection (AOI) and reliable solder joint formation, as documented in Nexperia's package reliability reports.