Nexperia USA Inc. 74AUP1G16GMH
- Part No.:
- 74AUP1G16GMH
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G16GMH.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:2,523
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Product details
Overview
74AUP1G16GMH from Nexperia is a single-channel low-power Schmitt-trigger buffer IC operating from 0.8 V to 3.6 V supply, delivering 1.4 μA max ICC at −40 °C to +125 °C, with IOFF-enabled partial power-down protection and 2.3 ns typical propagation delay at 3.0 V/CL = 5 pF. It serves as a noise-immune signal conditioner in battery-powered sensor interfaces and I²C bus level-shifting nodes.
For engineers reviewing the 74AUP1G16GMH datasheet, 74AUP1G16GMH pinout, 74AUP1G16GMH application, or 74AUP1G16GMH equivalent, key selection criteria include its ultra-low static current, guaranteed operation down to 0.8 V, IOFF backflow prevention during power sequencing, and validated performance across −40 °C to +125 °C industrial temperature range.
Technical Context
This device implements a non-inverting buffer with Schmitt-trigger inputs, enabling robust signal integrity for slow-rising or noisy digital signals across its full 0.8 V–3.6 V VCC range. Input hysteresis ensures reliable switching even with degraded edge rates up to 200 ns/V.
The IOFF circuit actively disables output terminals when VCC = 0 V, limiting leakage to ±0.75 μA and preventing destructive back-current flow in multi-rail systems. Its XSON6 (SOT886) package supports high-density PCB layouts with 1.0 mm × 1.45 mm footprint and 0.5 mm height.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range | 0.8 V to 3.6 V - Enables direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| ICC (max) | 1.4 μA at −40 °C to +125 °C - Ensures <1.5 μW static power at 1.8 V, critical for always-on IoT sensor nodes. |
| tpd (typ) | 2.3 ns at VCC = 3.0 V, CL = 5 pF - Supports >200 MHz signal conditioning in high-speed control loops. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - Prevents cross-rail current injection during hot-swap or partial power-down sequences. |
| VIH/VIL Hysteresis | 0.3×VCC min input hysteresis - Tolerates >100 mV noise on slow edges without chatter, verified per JEDEC JESD8-12/11/7/5/B. |
| ESD Rating | HBM >5000 V, CDM >1000 V - Meets industrial-grade ESD immunity requirements without external protection. |
| Operating Temp | −40 °C to +125 °C - Qualified for under-hood automotive modules, industrial PLC I/O, and outdoor edge compute. |
Pinout & Package
XSON6 (SOT886) package: plastic extremely thin small outline, no leads, 6-terminal surface-mount, body dimensions 1.0 mm × 1.45 mm × 0.5 mm, thermal pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A | Single data input with Schmitt-trigger threshold; accepts up to 3.6 V regardless of VCC. |
| 2 | n.c. | No-connect terminal - electrically isolated, must remain unconnected per datasheet. |
| 3 | GND | Digital ground reference; decoupling capacitor must be placed within 2 mm for stable low-noise operation. |
| 4 | n.c. | No-connect terminal - electrically isolated, must remain unconnected per datasheet. |
| 5 | VCC | Supply voltage input; requires local 100 nF ceramic decoupling adjacent to pin. |
| 6 | Y | Inverting-buffered output; drives capacitive loads ≤30 pF with guaranteed timing across full VCC/temp range. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low ICC | 1.4 μA max over full temperature range - extends battery life in coin-cell-powered wearables by >10 years. |
| IOFF Power-Down | Active output disable at VCC = 0 V - eliminates backfeed risk in mixed-voltage FPGA I/O banks and PMIC sequenced rails. |
| Schmitt-Trigger Inputs | Input hysteresis ≥0.3×VCC - enables clean signal regeneration from RC-filtered or long-trace sensor outputs. |
| Wide-Voltage Compatibility | 0.8 V–3.6 V operation - supports direct connection to sub-1 V AI accelerators and legacy 3.3 V peripherals. |
| High-Noise Immunity | Low undershoot/overshoot (<10 % VCC) and >5 kV HBM - sustains reliability in motor-drive EMI environments. |
Applications
| Industrial Sensor Interface | I²C Bus Level-Shifting |
|---|---|
|
Use Scenario: Signal conditioning for analog-output temperature sensors feeding into low-voltage microcontrollers. IC Role / Device Role / Timing Role: Single-buffer amplifier with Schmitt-trigger input cleans slow-rising thermistor ADC enable pulses and rejects EMI-induced glitches. Use Value: Eliminates need for external RC filtering and discrete transistor buffers, reducing BOM count by one component while improving startup reliability. |
Use Scenario: Bidirectional voltage translation between 1.8 V MCU I²C pins and 3.3 V EEPROM or display driver. IC Role / Device Role / Timing Role: Direction-agnostic buffer isolates voltage domains while preserving I²C timing integrity and open-drain behavior. Use Value: Maintains 400 kHz I²C timing margins across VCC combinations without pull-up resistor recalculations or timing violations. |
| Wearable Device Power Sequencing | Automotive Body Control Module |
|
Use Scenario: Enabling/disabling subsystem power rails during sleep/wake transitions in hearables. IC Role / Device Role / Timing Role: IOFF-enabled buffer gates enable signals to PMICs, blocking reverse current when main rail powers down before peripheral rails. Use Value: Prevents uncontrolled discharge paths that cause brownouts or latch-up in multi-rail SoC power domains. |
Use Scenario: Isolating CAN transceiver standby control lines from 5 V microcontroller GPIO in door module ECUs. IC Role / Device Role / Timing Role: Low-leakage buffer translates 3.3 V wake-up pulse to 5 V domain while surviving load-dump transients via robust ESD structure. Use Value: Replaces discrete MOSFET level shifter with guaranteed 125 °C operation and <0.5 μA quiescent draw during vehicle off-state. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G17DBVR | Higher ICC (10 μA typ), no IOFF, 1.65 V–5.5 V VCC range | Lacks power-down isolation; unsuitable for hot-swap or partial shutdown systems | Select only if 5 V compatibility is mandatory and power sequencing is absent. |
| 74LVC1G16GW,518 | TSSOP5 package (5-pin), same electrical specs but larger footprint and higher thermal resistance | Less suitable for space-constrained wearables; requires 0.65 mm pitch reflow profile | Prefer for prototyping or where XSON6 assembly capability is unavailable. |
Compared with SN74LVC1G17DBVR, 74AUP1G16GMH delivers 7× lower static current and essential IOFF protection; versus 74LVC1G16GW, it reduces board area by 62 % and improves thermal performance in sealed enclosures.
Availability
74AUP1G16GMH is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable power sequencing, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G16GMH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions, serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-constrained applications demanding sub-microamp ICC, wide-VCC operation, and robust IOFF behavior-designed specifically for battery-powered and thermally restricted systems.
FAQ
Does 74AUP1G16GMH support true bidirectional signal translation?
No. It is a unidirectional non-inverting buffer (A → Y only). While it can sit between two voltage domains, directionality is fixed and cannot auto-sense or switch based on signal flow. For true bidirectional I²C level shifting, dedicated translators like PCA9306 are required.
Can pin 2 (n.c.) or pin 4 (n.c.) be used as thermal pads or grounding points?
No. Both pins are electrically isolated internal no-connect terminals per Nexperia's SOT886 mechanical drawing. Connecting them to GND or any potential violates the datasheet and may compromise ESD performance or cause parametric shifts due to parasitic coupling.
What is the maximum capacitive load this buffer can drive while maintaining timing specs?
The datasheet guarantees tpd ≤4.2 ns at VCC = 3.0 V with CL = 30 pF. Driving >30 pF increases propagation delay nonlinearly and may violate setup/hold margins in synchronous systems; for >30 pF loads, add series termination or use a higher-drive buffer.
Is 74AUP1G16GMH qualified for automotive AEC-Q100 testing?
No. This part is specified for −40 °C to +125 °C operation but is not AEC-Q100 qualified. Nexperia offers automotive-qualified equivalents (e.g., 74AUP1G16GM,115) with full PPAP documentation and stress-test validation for under-hood use.
74AUP1G16GMH Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1G16GMH FAQ
1.How can I place an order for 74AUP1G16GMH through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G16GMH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G16GMH reliable?
The price and inventory of 74AUP1G16GMH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G16GMH is usually 5 days.
3.What payment methods are accepted for 74AUP1G16GMH?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G16GMH transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G16GMH?
74AUP1G16GMH orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G16GMH order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G16GMH?
For technical support, including 74AUP1G16GMH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G16GMH requirements.
6.How does Aetrix verify that 74AUP1G16GMH is sourced from the original manufacturer or authorized distributors?
All 74AUP1G16GMH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G16GMH meets industry standards.
7.What is the process for return or replacement of 74AUP1G16GMH?
All 74AUP1G16GMH units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G16GMH, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G16GMH part is unused and in its original packaging.
Return procedure for 74AUP1G16GMH:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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