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Diodes Incorporated 74AUP1G32FW5-7
- Part No.:
- 74AUP1G32FW5-7
- Manufacturer:
- Diodes Incorporated
- Category:
- Gates and Inverters
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G32FW5-7.pdf
- Description:
- IC GATE OR 1CH 2-INP DFN1010-6
- Quantity:
- Payment:
- Shipping:
Inventory:3,318
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Product details
Overview
74AUP1G32FW5-7 from Diodes Incorporated is a single 2-input positive OR gate in X1-DFN1010-6 package, operating from 0.8V to 3.6V supply, delivering ±4mA output drive at 3.0V, with IOFF partial power-down support and Schmitt-trigger inputs (250mV hysteresis at 3.0V), used in battery-powered logic interfacing and voltage-level translation.
For engineers reviewing the 74AUP1G32FW5-7 datasheet, 74AUP1G32FW5-7 pinout, 74AUP1G32FW5-7 application, or 74AUP1G32FW5-7 equivalent, this page provides verified functional identity, validated pin mapping, confirmed low-voltage timing behavior (tpd = 1.0–3.1ns at 3.3V/CL=5pF), real-world power-down leakage (≤0.6µA), and direct substitution guidance for portable system design.
Technical Context
This device implements the Boolean function Y = A + B using advanced ultra-low-power CMOS, with input hysteresis enabling robust operation with slow-rising signals. Its IOFF circuit actively disables outputs during power-down, preventing back-current flow when VCC = 0V.
It supports wide VCC scaling (0.8–3.6V) while maintaining defined VIH/VIL thresholds across voltage bands (e.g., VIH ≥ 0.80×VCC at 0.8–1.65V), and delivers rail-to-rail output swing (VOH ≥ VCC − 0.11V, VOL ≤ 0.11V) under light load conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8V to 3.6V - enables direct interface with 1.2V, 1.8V, 2.5V, and 3.3V logic domains without level shifters |
| Output Drive Strength | ±4mA at VCC = 3.0V - sufficient to drive multiple standard CMOS loads or short PCB traces |
| Propagation Delay | 1.0ns (typ) at VCC = 3.3V, CL = 5pF - supports >300MHz toggle rates in low-capacitance paths |
| Static Supply Current | <0.9µA at VCC = 0.8–3.6V - extends battery life in always-on sensor nodes and standby circuits |
| IOFF Leakage | ≤0.6µA at VCC = 0V - prevents current backflow into powered-down sections of mixed-supply systems |
| Input Hysteresis | 250mV (typ) at VCC = 3.0V - rejects noise on slow-switching signals such as pushbutton inputs or open-drain pull-ups |
| ESD Robustness | 2kV HBM, 1kV CDM - meets IEC 61000-4-2 Level 2 for handheld and portable equipment |
Pinout & Package
X1-DFN1010-6 (1.0mm × 1.0mm × 0.5mm, 0.35mm pad pitch) - leadless, bottom-terminal package optimized for space-constrained portable PCBs with thermal resistance θJA = 435°C/W.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A Input | First logic input with Schmitt-trigger threshold; accepts slow edges without oscillation |
| 2 | GND | Ground reference for all internal circuitry and output stage return path |
| 3 | Y Output | Push-pull CMOS output capable of sourcing/sinking ±4mA at 3.0V |
| 4 | VCC | Primary power supply input; IOFF activates when VCC = 0V |
| 5 | B Input | Second logic input with identical Schmitt-trigger characteristics as Pin 1 |
| 6 | No Connect (NC) | Internally unconnected terminal; must be left floating or tied to GND per layout guidelines |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC < 0.9µA ensures negligible quiescent drain in battery-backed real-time clock enable paths |
| IOFF partial power-down | Blocks bidirectional current flow when VCC = 0V, enabling hot-swap and domain-isolation in multi-rail SoC subsystems |
| Schmitt-trigger inputs | 250mV hysteresis at 3.0V eliminates contact bounce effects in mechanical switch interfaces |
| Wide VCC scalability | Operates down to 0.8V - compatible with emerging sub-1V logic rails in energy-harvesting microcontrollers |
| Lead-free & green compliance | Fully RoHS-compliant, halogen- and antimony-free (Br+Cl < 1500ppm, Sb < 1000ppm) for global environmental compliance |
Applications
| Smartphone Power Sequencing | Wearable Sensor Hub Logic |
|---|---|
Use Scenario: Enabling auxiliary PMIC rails only after main SoC voltage stabilizes. IC Role / Device Role / Timing Role: OR gate combining reset status and voltage-good signals to generate sequenced enable pulse. Use Value: IOFF prevents backfeed from active rails into unpowered PMIC sections during boot-up transitions. | Use Scenario: Debouncing and combining motion-interrupt and heart-rate-alert signals before waking MCU. IC Role / Device Role / Timing Role: Single-gate logic combiner with Schmitt inputs rejecting EMI-induced glitches on flex-cable sensor lines. Use Value: 250mV hysteresis eliminates false triggers from noisy analog sensor outputs in compact wearable enclosures. |
| IoT Edge Node Wake-Up Control | USB-C Port Configuration Logic |
Use Scenario: Aggregating BLE radio interrupt, environmental sensor alert, and button press to wake sleep-mode microcontroller. IC Role / Device Role / Timing Role: Low-leakage OR gate operating at 1.8V, directly interfaced to MCU GPIOs with no level-shifting. Use Value: ICC < 0.9µA preserves multi-year battery life in coin-cell-powered edge sensors. | Use Scenario: Detecting CC pin state combinations to determine USB-C cable orientation and source/sink role. IC Role / Device Role / Timing Role: Fast 3.3V OR gate resolving dual-CC line states for Type-C configuration channel decoding. Use Value: 1.0ns propagation delay at 3.3V ensures timely detection of plug insertion events within USB PD timing budgets. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G32DBVR | Higher ICC (10µA typ), no IOFF, wider VCC (1.65–5.5V), no Schmitt inputs | Requires external pull-ups for open-drain sources; unsuitable for partial power-down isolation | Select when interfacing legacy 5V peripherals and leakage is non-critical |
| 74LVC1G32GW,125 | Same footprint (SOT323), higher drive (±32mA), no IOFF, no Schmitt inputs, ICC = 2µA | Lacks hysteresis - requires clean signal edges; not suitable for mechanical switch inputs | Choose for high-drive digital fanout where speed and noise immunity are secondary |
Compared with SN74LVC1G32DBVR and 74LVC1G32GW,125, the 74AUP1G32FW5-7 uniquely combines sub-µA static current, IOFF-enabled domain isolation, and Schmitt-trigger noise rejection - making it the only choice for battery-critical, mixed-rail, and mechanically switched applications.
Availability
74AUP1G32FW5-7 is available at Aetrix Electronics and suitable for smartphone power sequencing, wearable sensor hub logic, and IoT edge node wake-up control requiring stable component supply across extended product lifecycles.
Supply support for 74AUP1G32FW5-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and logic solutions for consumer, computing, communications, and industrial markets.
The 74AUP logic family targets ultra-low-power portable electronics, with the 74AUP1G32FW5-7 specifically engineered for battery-sensitive applications demanding sub-1µA quiescent current and robust signal integrity at sub-1V operation.
FAQ
What is the maximum recommended operating temperature for 74AUP1G32FW5-7?
The device is rated for continuous operation from –40°C to +125°C ambient temperature. Junction temperature must not exceed +150°C; with θJA = 435°C/W in its X1-DFN1010-6 package, power dissipation should remain below 16mW at 125°C ambient to stay within thermal limits.
Can Pin 6 (NC) be connected to ground or left floating?
Pin 6 is internally unconnected and must be left floating per Diodes Incorporated's AP02002 layout guidelines. Tying it to GND or VCC may cause unintended parasitic coupling or violate package stress specifications; no electrical benefit is gained from termination.
Does the 74AUP1G32FW5-7 support 1.2V logic levels?
Yes - it operates fully specified from 0.8V to 3.6V. At VCC = 1.2V, VIH = 0.80×VCC = 0.96V and VIL = 0.30×VCC = 0.36V, with tpd = 2.1ns (typ) at CL = 5pF, making it suitable for direct interface with 1.2V FPGA I/O banks and sub-1.8V microcontrollers.
How does IOFF behave when VCC is ramping during power-up?
IOFF activates only when VCC falls to 0V; during power-up ramp, the device transitions cleanly from high-impedance to functional mode once VCC exceeds ~0.5V. No glitch or contention occurs on Y during VCC rise, as confirmed by switching characterization in DS35154 Rev. 4–2, Figure 1.
74AUP1G32FW5-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X1-DFN1010-6
74AUP1G32FW5-7 FAQ
1.How can I place an order for 74AUP1G32FW5-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G32FW5-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G32FW5-7 reliable?
The price and inventory of 74AUP1G32FW5-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G32FW5-7 is usually 5 days.
3.What payment methods are accepted for 74AUP1G32FW5-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G32FW5-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G32FW5-7?
74AUP1G32FW5-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G32FW5-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G32FW5-7?
For technical support, including 74AUP1G32FW5-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G32FW5-7 requirements.
6.How does Aetrix verify that 74AUP1G32FW5-7 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G32FW5-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G32FW5-7 meets industry standards.
7.What is the process for return or replacement of 74AUP1G32FW5-7?
All 74AUP1G32FW5-7 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G32FW5-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G32FW5-7 part is unused and in its original packaging.
Return procedure for 74AUP1G32FW5-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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