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Nexperia USA Inc. 74AUP1G32GW-Q100H
- Part No.:
- 74AUP1G32GW-Q100H
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G32GW-Q100H.pdf
- Description:
- IC GATE OR 1CH 2-INP 5TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:2,358
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Product details
Overview
74AUP1G32GW-Q100 from Nexperia is an automotive-qualified, single 2-input OR gate in TSSOP5 (SOT353-1) package, operating across 0.8 V to 3.6 V supply voltage with Schmitt-trigger inputs for noise immunity and IOFF circuitry enabling partial power-down mode. It delivers propagation delay as low as 0.9 ns at 3.6 V/CL=5 pF and static ICC ≤ 1.4 µA over –40 °C to +125 °C, used in automotive body control modules for logic-level signal combining.
For engineers reviewing the 74AUP1G32GW-Q100 datasheet, 74AUP1G32GW-Q100 pinout, 74AUP1G32GW-Q100 application, or 74AUP1G32GW-Q100 equivalent, this page provides verified functional identity, validated pin mapping, confirmed AEC-Q100 Grade 1 qualification, exact TSSOP5 mechanical dimensions, and real-world automotive use context - all derived from Nexperia's official Rev. 7 product data sheet dated 20 September 2024.
Technical Context
This device implements a single 2-input positive-logic OR function with Schmitt-trigger inputs that tolerate slow edge rates across its full 0.8–3.6 V VCC range. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
It complies with JEDEC standards JESD8-12 through JESD8-B for multi-voltage operation and meets AEC-Q100 Grade 1 requirements (–40 °C to +125 °C), with ESD robustness of HBM >5000 V and CDM >1000 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Single 2-input OR gate with true-positive output behavior per IEC 60617-12 symbol |
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 0.8 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains |
| Propagation Delay | 0.9 ns (min) to 4.6 ns (max) at VCC = 3.0–3.6 V and CL = 5 pF - supports high-speed signal routing in compact automotive ECUs |
| Static Supply Current | ≤ 1.4 µA at –40 °C to +125 °C - ensures ultra-low quiescent power in always-on vehicle subsystems |
| IOFF Leakage | ±0.75 µA max at VCC = 0 V - prevents damaging back-current during hot-swap or partial system shutdown |
| Input Thresholds | VIL ≤ 0.30×VCC, VIH ≥ 0.70×VCC at VCC = 0.8 V - guarantees reliable switching with noisy or slew-limited signals |
| Operating Temperature | –40 °C to +125 °C - qualified per AEC-Q100 Grade 1 for under-hood and cabin electronics |
Pinout & Package
TSSOP5 (SOT353-1) package: plastic thin shrink small outline, 5-lead, 1.25 mm body width, 0.65 mm lead pitch, 0.1 mm minimum lead thickness. Pin 1 index located on lower-left corner below marking code "pG".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | B | Second logic input; accepts voltages up to 3.6 V independent of VCC |
| 2 | A | Primary logic input; Schmitt-triggered for noise rejection on slow-rising/falling edges |
| 3 | GND | Ground reference (0 V); required for stable biasing and ESD path integrity |
| 4 | Y | OR-gate output; actively driven HIGH/LOW; supports IOFF state when VCC = 0 V |
| 5 | VCC | Positive supply rail; powers internal logic and output stage; IOFF activation occurs when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| AEC-Q100 Grade 1 qualification | Validated for automotive use from –40 °C to +125 °C ambient, including thermal cycling and humidity testing |
| Schmitt-trigger inputs | Hysteresis ≥ 0.15×VCC ensures clean transitions on noisy or RC-filtered signals without external debouncing |
| IOFF partial power-down | Output high-impedance state activated automatically at VCC = 0 V, eliminating backfeed risk in multi-rail systems |
| Multi-standard voltage compliance | Meets JESD8-12 (0.8–1.3 V), JESD8-11 (0.9–1.65 V), JESD8-7 (1.2–1.95 V), JESD8-5 (1.8–2.7 V), JESD8-B (2.7–3.6 V) |
| Low dynamic power dissipation | CPD = 3.9 pF at VCC = 3.3 V - enables sub-µW dynamic power at 1 MHz clock rate in battery-sensitive nodes |
Applications
| Body Control Module Logic | Door Module Signal Combining |
|---|---|
|
Use Scenario: Combining door-open and window-ajar sensor signals before sending to central ECU. IC Role / Device Role / Timing Role: Single OR gate performing level-sensitive signal aggregation with no timing constraints. Use Value: Eliminates need for microcontroller GPIO polling; reduces BOM count and firmware complexity while maintaining fail-safe behavior. |
Use Scenario: Merging wake-up requests from key fob receiver and interior switch in smart entry system. IC Role / Device Role / Timing Role: Glue logic element enabling fast, deterministic wake-up assertion independent of MCU state. Use Value: Enables immediate system response (<5 ns added delay) with zero software latency and guaranteed power-down isolation via IOFF. |
| LED Driver Enable Logic | Diagnostic Alert Merging |
|
Use Scenario: Enabling LED driver IC only when both ignition ON and fault-free status are asserted. IC Role / Device Role / Timing Role: Safety-critical enable gate ensuring driver activation requires dual valid conditions. Use Value: Prevents unintended LED illumination during boot or fault states; IOFF blocks leakage when main rail is off. |
Use Scenario: Consolidating multiple CAN-based diagnostic alerts (e.g., HVAC, lighting, seat control) into one indicator line. IC Role / Device Role / Timing Role: Asynchronous alert combiner feeding dashboard warning cluster. Use Value: Reduces wiring harness complexity and ECU pin count; Schmitt inputs reject transient noise on long PCB traces. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74AUP1G32GM-Q100 | XSON6 (SOT886) package: 6-terminal, leadless, 1.0 × 1.45 × 0.5 mm; no exposed pad; higher thermal resistance than TSSOP5 | Preferred for space-constrained PCB layouts where footprint area < 1.5 mm² is critical; not suitable for optical inspection or hand-soldering | Select when board real estate is primary constraint and automated reflow is guaranteed; verify thermal derating above 74 °C. |
| 74AUP1G32GZ-Q100 | XSON5 (SOT8065-1) package: 5-terminal, side-wettable flanks (SWF), 1.1 × 0.85 × 0.5 mm; enhanced thermal performance vs. GM variant | Optimized for automated optical inspection (AOI) and solder joint reliability in high-reliability automotive production | Choose for production lines requiring IPC-A-610-compliant solder joint verification; SWF enables X-ray and AOI validation. |
Compared with 74AUP1G32GW-Q100, the GM variant trades TSSOP5 serviceability for minimal footprint, while the GZ variant adds manufacturability assurance via side-wettable flanks - all share identical logic behavior, AEC-Q100 Grade 1 rating, and IOFF functionality.
Availability
74AUP1G32GW-Q100 is available at Aetrix Electronics and suitable for automotive body control modules, door module signal aggregation, LED driver enable logic, and diagnostic alert merging requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G32GW-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert specializing in high-volume, high-reliability logic, analog, and discrete components, with core expertise in automotive-qualified standard products.
This device belongs to the 74AUP (Advanced Ultra-low Power) logic family, designed specifically for energy-efficient automotive and portable electronics requiring wide-VCC operation, robust noise immunity, and seamless integration into multi-voltage systems.
FAQ
Is 74AUP1G32GW-Q100 pin-compatible with non-automotive 74AUP1G32 variants?
Yes - it shares identical pinout (TSSOP5/SOT353-1), logic function, and electrical specifications with industrial-grade 74AUP1G32GW, but adds AEC-Q100 Grade 1 qualification, extended temperature testing, and automotive-specific reliability screening per Nexperia's Rev. 7 datasheet.
What is the maximum capacitive load this OR gate can drive reliably?
Per Nexperia's dynamic characterization, it drives up to 30 pF load capacitance with guaranteed propagation delay (≤8.5 ns at VCC = 3.6 V, –40 °C to +125 °C). For loads >30 pF, output rise/fall times increase linearly; design margin requires derating based on CL and VCC per Table 9.
Does the IOFF feature require external control or is it automatic?
IOFF is fully automatic: when VCC drops to 0 V, internal circuitry forces Y into high-impedance state regardless of A/B input states. No enable/disable pin or external bias is needed - this behavior is intrinsic to the silicon design and verified across –40 °C to +125 °C.
Can this device operate at 0.8 V supply while interfacing with 3.3 V inputs?
Yes - inputs accept voltages up to 3.6 V irrespective of VCC level. At VCC = 0.8 V, VIH is 0.70×VCC = 0.56 V and VIL is 0.25×VCC = 0.20 V, so a 3.3 V input is safely clamped and interpreted as HIGH, enabling level-shifting without external components.
74AUP1G32GW-Q100H Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- Automotive
- Qualification:
- AEC-Q100
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G32GW-Q100H FAQ
1.How can I place an order for 74AUP1G32GW-Q100H through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G32GW-Q100H on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G32GW-Q100H reliable?
The price and inventory of 74AUP1G32GW-Q100H are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G32GW-Q100H is usually 5 days.
3.What payment methods are accepted for 74AUP1G32GW-Q100H?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G32GW-Q100H transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G32GW-Q100H?
74AUP1G32GW-Q100H orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G32GW-Q100H order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G32GW-Q100H?
For technical support, including 74AUP1G32GW-Q100H datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G32GW-Q100H requirements.
6.How does Aetrix verify that 74AUP1G32GW-Q100H is sourced from the original manufacturer or authorized distributors?
All 74AUP1G32GW-Q100H products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G32GW-Q100H meets industry standards.
7.What is the process for return or replacement of 74AUP1G32GW-Q100H?
All 74AUP1G32GW-Q100H units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G32GW-Q100H, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G32GW-Q100H part is unused and in its original packaging.
Return procedure for 74AUP1G32GW-Q100H:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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