Nexperia USA Inc. 74AUP1G32GW-Q100/H

Overview

74AUP1G32GW-Q100 from Nexperia is an automotive-qualified, single 2-input OR gate in TSSOP5 (SOT353-1) package, operating from 0.8 V to 3.6 V supply, featuring Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from −40 °C to +125 °C. It delivers ultra-low static current (≤1.4 µA), propagation delay as low as 0.9 ns at 3.3 V/CL=5 pF, and supports mixed-voltage interfacing up to 3.6 V on inputs.

For engineers reviewing the 74AUP1G32GW-Q100 datasheet, 74AUP1G32GW-Q100 pinout, 74AUP1G32GW-Q100 application, or 74AUP1G32GW-Q100 equivalent, this device is selected for low-power logic level translation, automotive body control modules, battery-powered sensor interface conditioning, and partial-power-down subsystems requiring AEC-Q100 Grade 1 compliance and robust input hysteresis.

Technical Context

This device implements a single 2-input positive-logic OR function with Schmitt-trigger inputs-ensuring reliable switching despite slow-rising or noisy signals across its full 0.8 V–3.6 V VCC range. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

It complies with JEDEC standards JESD8-12 through JESD8-B for multi-voltage operation and meets AEC-Q100 Grade 1 requirements (−40 °C to +125 °C), with ESD robustness of >5000 V HBM and >1000 V CDM. Input tolerance up to 3.6 V enables interfacing with higher-voltage logic without level shifters.

Key Specifications

Pinout & Package

TSSOP5 (SOT353-1) package: plastic thin shrink small outline, 5-lead, 1.25 mm body width, 0.65 mm lead pitch, 0.5 mm nominal height.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input OR gate applications.

Compared with 74LVC1G32GV-Q100 and SN74AUP1G32DSFR, the 74AUP1G32GW-Q100 uniquely combines AEC-Q100 Grade 1 qualification, Schmitt-trigger inputs, and sub-2 µA ICC - making it the only choice for noise-prone, thermally demanding automotive subsystems requiring fail-safe power-down behavior.

Availability

74AUP1G32GW-Q100 is available at Aetrix Electronics and suitable for automotive body control units, battery management systems, and industrial PLC I/O expansion requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G32GW-Q100 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert specializing in high-volume, high-reliability logic, discrete, and MOSFET solutions, with leadership in automotive-qualified components and energy-efficient technologies.

The 74AUP (Advanced Ultra-low Power) product line targets battery-sensitive and thermally constrained automotive and industrial applications, delivering sub-microamp static current and robust operation across wide voltage and temperature ranges.

FAQ

Does the 74AUP1G32GW-Q100 support mixed-voltage operation where inputs exceed VCC?

Yes - inputs tolerate up to 3.6 V regardless of VCC level (0.8 V–3.6 V), enabling direct connection to higher-voltage logic families without external level shifters. This is confirmed in Table 6 (VI input voltage: 0–3.6 V) and Section 2 ('Inputs accept voltages up to 3.6 V').

What is the maximum allowable load capacitance for maintaining specified propagation delay?

The datasheet specifies tpd performance up to CL = 30 pF across all VCC and temperature conditions. At VCC = 3.3 V and Tamb = 125 °C, tpd remains ≤8.5 ns with CL = 30 pF (Table 9), confirming robust drive capability into typical PCB trace + IC input capacitance loads.

How does the IOFF feature behave when VCC is ramping during power-up?

IOFF activates only when VCC = 0 V. During power-up, the device transitions from high-Z to active operation once VCC exceeds ~0.2 V (per ΔIOFF spec). No undefined state or contention occurs - output remains high-Z until VCC reaches valid logic threshold (~0.7×VCC).

Is the Schmitt-trigger hysteresis value fixed or supply-dependent?

Hysteresis is supply-proportional: typical ΔV = 0.1 × VCC (Section 2, 'Schmitt-trigger action'; Table 7 VIH/VIL min/max confirm ratio-based thresholds). At 1.2 V supply, hysteresis ≈120 mV; at 3.3 V, ≈330 mV - scaling maintains consistent noise margin across voltage domains.