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Nexperia USA Inc. 74AUP1G32GX,125
- Part No.:
- 74AUP1G32GX,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 4-XFDFN Exposed Pad
- Datasheet:
-
74AUP1G32GX,125.pdf
- Description:
- IC GATE OR 1CH 2-INP 5X2SON
- Quantity:
- Payment:
- Shipping:
Inventory:2,799
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Product details
Overview
74AUP1G32GX,125 from Nexperia is a single 2-input OR gate in X2SON5 (SOT1226-3) package, operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. Used in low-power logic interfacing in battery-powered IoT sensors and portable medical monitors.
For engineers reviewing the 74AUP1G32GX,125 datasheet, 74AUP1G32GX,125 pinout, 74AUP1G32GX,125 application, or 74AUP1G32GX,125 equivalent, key selection criteria include its ultra-low ICC (≤1.4 µA max), 5-terminal thermal-enhanced X2SON5 footprint, Schmitt-trigger input hysteresis, and IOFF-enabled system-level power sequencing in mixed-voltage embedded subsystems.
Technical Context
This device implements standard positive-logic OR functionality (Y = A + B) with Schmitt-trigger inputs that provide ≥0.3×VCC hysteresis across 0.8–3.6 V, enabling robust operation with slow-rising signals. Its IOFF circuit actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 µA.
Propagation delay ranges from 0.9 ns (VCC = 3.6 V, CL = 5 pF) to 8.5 ns (VCC = 1.1 V, CL = 30 pF) over full temperature range. Input capacitance is 0.8 pF; output capacitance is 1.7 pF - critical for high-speed, low-load digital interface design.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (Static) | 1.4 µA at –40 °C to +125 °C - enables multi-year battery life in always-on sensor nodes. |
| IOFF Leakage | ±0.75 µA at VCC = 0 V - prevents cross-conduction during hot-swap or partial power-down sequences. |
| Propagation Delay | 0.9–8.5 ns (VCC = 1.1–3.6 V, CL = 5–30 pF) - ensures timing compliance in sub-100 MHz control paths. |
| Input Hysteresis | ≥0.3×VCC - rejects >100 mV of high-frequency noise on slow GPIO lines in industrial environments. |
| ESD Rating | HBM >5000 V, CDM >1000 V - eliminates need for external ESD protection in handheld device I/O stages. |
| Operating Temp | –40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor controllers. |
Pinout & Package
X2SON5 package (SOT1226-3): plastic thermal-enhanced extremely thin small outline, no leads, 5 terminals, body size 0.8 × 0.8 × 0.32 mm, side-wettable flanks not present (distinct from GZ variant).
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | B | Second logic input; Schmitt-triggered, tolerant to slow edges and noise up to 3.6 V regardless of VCC. |
| 2 | A | Primary logic input; identical electrical behavior to Pin 1; supports asynchronous OR gating. |
| 3 | GND | Digital ground reference; must be low-impedance connection to minimize switching noise coupling. |
| 4 | Y | OR output; rail-to-rail swing (VOH ≥ VCC–0.1 V, VOL ≤ 0.5 V @ 4 mA), drives 5 pF loads with <1 ns jitter. |
| 5 | VCC | Power supply input; decoupling capacitor (100 nF) required within 2 mm for stable high-speed operation. |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables reliable logic decision with input rise/fall times up to 200 ns/V - eliminates external RC filtering in noisy environments. |
| IOFF partial power-down | Prevents damaging back-current flow when VCC is off but A/B/Y pins remain biased - essential for FPGA I/O bank isolation. |
| Ultra-low static power | ICC ≤ 1.4 µA across full temp range allows integration into energy-harvesting systems with µW budgets. |
| Overvoltage-tolerant inputs | Accepts 0–3.6 V signals independent of VCC setting - simplifies mixed-supply signal routing in modular PCB designs. |
| Thermally enhanced X2SON5 | 0.32 mm height and 0.64 mm² footprint enable dense placement in space-constrained wearables and hearing aids. |
Applications
| Industrial Sensor Interface | Portable Medical Monitor |
|---|---|
|
Use Scenario: Combining fault alerts from multiple analog front-end ICs into a single interrupt line routed to MCU. IC Role / Device Role / Timing Role: OR gate aggregating active-low fault flags; Schmitt inputs reject EMI-induced glitches on long traces. Use Value: Eliminates need for discrete pull-up resistors and RC filters while maintaining <1 µs response latency. |
Use Scenario: Enabling wake-on-event logic for low-power pulse oximeter where motion, SpO₂, and battery-low signals trigger wake-up. IC Role / Device Role / Timing Role: Single gate performing OR of three independent wake sources via cascaded 74AUP1G32 devices. Use Value: Draws only 1.4 µA static current - extends coin-cell battery life beyond 18 months in standby mode. |
| Automotive Body Control Module | IoT Edge Node Gateway |
|
Use Scenario: Merging door-open, trunk-open, and hood-open switch signals for centralized status reporting. IC Role / Device Role / Timing Role: Level-shifting OR gate accepting 12 V switch inputs via resistor divider, referenced to 3.3 V MCU domain. Use Value: Overvoltage-tolerant inputs withstand 3.6 V transients without clamping diodes; operates reliably at 125 °C ambient. |
Use Scenario: Glue logic between LoRa transceiver's ready signal and microcontroller's sleep controller to prevent premature wake. IC Role / Device Role / Timing Role: OR gate synchronizing RF module ready and sensor data-ready events before waking CPU core. Use Value: Propagation delay <3.5 ns at 3.3 V ensures sub-microsecond event coordination - critical for duty-cycled operation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC1G32GW,125 | Higher ICC (max 40 µA), wider VCC (1.65–5.5 V), no Schmitt inputs, TSSOP5 package (1.25 mm width). | Requires external filtering for noisy inputs; unsuitable for sub-1 V systems or aggressive power gating. | Select when interfacing with 5 V peripherals and board space permits larger TSSOP5 footprint. |
| SN74AUP1G32DBVR | Same AUP family specs, but in SOT-23-5 (2.92 × 1.6 mm); higher thermal resistance (260 K/W vs. 220 K/W). | Larger footprint limits use in ultra-compact wearables; same electrical performance otherwise. | Choose if existing design uses SOT-23 land pattern and thermal derating margin >30 °C is available. |
Compared with 74LVC1G32GW,125 and SN74AUP1G32DBVR, the 74AUP1G32GX,125 uniquely combines X2SON5 miniaturization, Schmitt noise immunity, and sub-µA static power - making it optimal for thermally constrained, battery-sensitive, and EMI-prone edge-node implementations.
Availability
74AUP1G32GX,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical monitors, automotive body control modules, and IoT edge node gateways requiring stable component supply across extended temperature and long product lifecycles.
Supply support for 74AUP1G32GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions - serving automotive, industrial, and consumer markets with ISO/TS 16949-certified manufacturing.
The 74AUP (Advanced Ultra-low Power) logic family targets energy-constrained applications demanding sub-µA static current, wide VCC range, and robust noise immunity - optimized for battery-powered and thermally dense systems.
FAQ
Does 74AUP1G32GX,125 support true bidirectional operation?
No. It is a unidirectional logic gate with defined inputs (A, B) and output (Y). The IOFF feature only disables output drive during power-down; it does not enable bus-hold or bidirectional data flow. Pins A, B, and Y are electrically asymmetric per datasheet pin description and functional diagram.
Can 74AUP1G32GX,125 be used with 0.9 V supply in battery-powered designs?
Yes. The device is fully specified down to 0.8 V VCC, with VIH min = 0.65×VCC (0.585 V) and VOL max = 0.33×VCC (0.297 V) at 1.1 V - ensuring noise margins >150 mV even at 0.9 V, validated across –40 °C to +125 °C.
What is the maximum capacitive load this OR gate can drive reliably?
It is characterized up to 30 pF load capacitance, with tpd ≤ 8.5 ns at VCC = 1.1 V. For loads >30 pF, propagation delay increases linearly; slew rate remains controlled (overshoot/undershoot <10% of VCC), but timing closure requires verification at target VCC and temperature.
Is the X2SON5 package (SOT1226-3) compatible with standard reflow profiles?
Yes. The package is qualified for IPC/JEDEC J-STD-020D reflow, with peak temperature ≤260 °C. Its 0.32 mm profile and copper-leadframe construction ensure uniform thermal distribution - no special stencil or oven profiling is needed beyond standard lead-free processes.
74AUP1G32GX,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 4-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-X2SON (0.80x0.80)
74AUP1G32GX,125 FAQ
1.How can I place an order for 74AUP1G32GX,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G32GX,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G32GX,125 reliable?
The price and inventory of 74AUP1G32GX,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G32GX,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G32GX,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G32GX,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G32GX,125?
74AUP1G32GX,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G32GX,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G32GX,125?
For technical support, including 74AUP1G32GX,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G32GX,125 requirements.
6.How does Aetrix verify that 74AUP1G32GX,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G32GX,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G32GX,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G32GX,125?
All 74AUP1G32GX,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G32GX,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G32GX,125 part is unused and in its original packaging.
Return procedure for 74AUP1G32GX,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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