Nexperia USA Inc. 74AUP1G332GM,115
- Part No.:
- 74AUP1G332GM,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G332GM,115.pdf
- Description:
- IC GATE OR 1CH 3-INP 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:27,752
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Product details
Overview
74AUP1G332GM,115 from Nexperia is a single 3-input OR gate logic IC with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering <0.9 μA max ICC at 125 °C, IOFF-enabled partial power-down protection, and 6-terminal XSON6 (SOT886) package. It serves as a noise-immune signal combiner in low-voltage sensor interface and battery-powered control circuits.
For engineers reviewing the 74AUP1G332GM,115 datasheet, 74AUP1G332GM,115 pinout, 74AUP1G332GM,115 application, or 74AUP1G332GM,115 equivalent, this device is selected for ultra-low static power, wide-VCC compatibility, Schmitt-trigger input tolerance, and IOFF-backed system-level power sequencing in portable and industrial embedded designs.
Technical Context
This device implements standard positive-logic OR functionality (Y = A + B + C) with Schmitt-trigger inputs that provide hysteresis-ensuring robust operation against slow-rising or noisy signals. Input thresholds scale with VCC (e.g., VIH = 0.70×VCC min at 0.8 V), enabling reliable switching across its full 0.8–3.6 V range.
The IOFF circuit actively disables outputs when VCC = 0 V, blocking backflow current up to ±0.75 μA at 125 °C. Propagation delay is voltage- and load-dependent: 1.2–2.9 ns (CL = 5 pF, VCC = 3.0–3.6 V) and remains sub-7 ns even at CL = 30 pF and VCC = 1.1 V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | 3-input OR gate (Y = A ∨ B ∨ C); enables signal aggregation in digital control paths |
| Supply Voltage Range | 0.8 V to 3.6 V; supports direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V domains without level shifters |
| Max ICC (125 °C) | 0.9 μA; ensures negligible quiescent drain in always-on battery monitoring or wake-up logic |
| IOFF Leakage (125 °C) | ±0.75 μA; prevents cross-conduction during partial power-down of subsystems |
| Propagation Delay (CL = 5 pF) | 1.2–2.9 ns at VCC = 3.0–3.6 V; meets timing-critical signal routing in compact MCU peripheral interfaces |
| Input Hysteresis | Schmitt-trigger inputs with ~0.3×VCC typical hysteresis; rejects EMI and contact bounce in mechanical switch debouncing |
| ESD Rating | HBM >5000 V, CDM >1000 V; sustains handling and board-level transients without external protection |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886), 6-terminal, no leads, body dimensions 1.0 × 1.45 × 0.5 mm. Pin 1 index located on lower-left corner below marking code "aG".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Data input A | Primary OR operand; Schmitt-triggered for noise margin and slow-edge tolerance |
| 2 (GND) | Ground reference | 0 V return path; must be low-impedance to maintain noise immunity and output drive integrity |
| 3 (B) | Data input B | Second OR operand; electrically identical to A and C; supports asynchronous input arrival |
| 4 (Y) | Data output Y | Active-high OR result; drives CMOS loads up to 4 mA while maintaining VOL ≤ 0.50 V at VCC = 3.0 V |
| 5 (VCC) | Supply voltage | Power rail for internal logic and output stage; IOFF activates when VCC = 0 V |
| 6 (C) | Data input C | Third OR operand; completes 3-input function; all inputs share identical VIH/VIL thresholds |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC operation | 0.8 V to 3.6 V enables single-supply use across legacy and modern low-power microcontrollers |
| Schmitt-trigger inputs | Input hysteresis improves noise rejection by ≥100 mV at 1.8 V, eliminating need for external RC filtering |
| IOFF partial power-down | Output high-impedance state at VCC = 0 V prevents backfeed into powered rails during hot-swap or sleep mode |
| Low dynamic power | CPD = 4.0 pF at 3.3 V enables <1 μW dynamic dissipation at 1 MHz with 5 pF load |
| High ESD robustness | HBM >5000 V and CDM >1000 V reduce field failure risk in manual assembly and end-user environments |
Applications
| Industrial Sensor Interface | Portable Device Power Sequencing |
|---|---|
Use Scenario: Combining fault signals from three temperature, pressure, and humidity sensors in a smart thermostat. IC Role / Device Role / Timing Role: 3-input OR gate aggregates independent sensor alert lines into one interrupt signal routed to an MCU. Use Value: Eliminates discrete diode-OR wiring; Schmitt inputs tolerate slow sensor output edges; IOFF isolates sensor bus during MCU deep-sleep. |
Use Scenario: Enabling a backup power rail when main battery voltage, USB presence, and charger status all indicate readiness. IC Role / Device Role / Timing Role: Logic OR of three enable conditions drives a load switch control input. Use Value: Ultra-low ICC (<0.9 μA) avoids parasitic drain on coin-cell backup; 0.8 V operation supports brown-out detection before LDO regulation. |
| IoT Edge Node Wake-Up Logic | Automated Test Equipment (ATE) Signal Conditioning |
Use Scenario: Waking a BLE SoC from standby using any of three external triggers: button press, motion detection, or RF packet arrival. IC Role / Device Role / Timing Role: OR gate merges asynchronous wake sources into a single active-high reset/interrupt line. Use Value: Sub-3 ns propagation at 3.3 V ensures deterministic wake latency; Schmitt inputs reject ESD-induced glitches on unshielded PCB traces. |
Use Scenario: Validating pass/fail status from three independent test channels before releasing DUT to next station. IC Role / Device Role / Timing Role: Aggregates channel-specific PASS/FAIL flags into a global "test complete" signal. Use Value: 125 °C rating supports operation in thermally constrained ATE enclosures; latch-up immunity (>100 mA) withstands probe contact anomalies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G332DBVR | Higher ICC (max 10 μA at 125 °C); no IOFF; 5-pin SOT-23 package | Lacks power-down isolation; unsuitable for mixed-rail hot-swap systems | Select only if IOFF is unnecessary and board space permits larger footprint |
| 74LVC1G332GW,125 | TSSOP6 (SOT363-2) package; same electrical specs but 2.2 mm × 1.35 mm body vs. 1.45 mm × 1.0 mm | Requires different land pattern and reflow profile; higher thermal resistance (3.7 mW/K derating above 83 °C) | Prefer for hand-soldering or legacy TSSOP-compatible designs; avoid for ultra-dense layouts |
Compared with SN74LVC1G332DBVR and 74LVC1G332GW,125, the 74AUP1G332GM,115 delivers lowest static power, guaranteed IOFF behavior, and smallest footprint-making it optimal for space-constrained, battery-sensitive, and multi-rail power-gated systems.
Availability
74AUP1G332GM,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable device power sequencing, IoT edge node wake-up logic, and automated test equipment requiring stable component supply across extended temperature and low-voltage operation.
Supply support for 74AUP1G332GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra Low Power) product line is engineered for ultra-low static and dynamic power consumption in battery-powered and thermally constrained applications, with emphasis on wide-VCC compatibility and robust I/O behavior.
FAQ
What is the minimum supply voltage at which 74AUP1G332GM,115 guarantees correct logic operation?
The device is fully specified down to 0.8 V VCC across –40 °C to +125 °C. At this voltage, VIH is guaranteed ≥0.75×VCC (≥0.60 V) and VIL ≤0.25×VCC (≤0.20 V), with propagation delay ≤17.6 ns (CL = 5 pF). This enables reliable operation directly from single-cell LiFePO₄ or NiMH batteries without regulation.
How does the IOFF feature behave when VCC is ramping or partially powered?
IOFF activates when VCC falls below ~0.2 V, forcing Y into high-impedance regardless of input states. During VCC ramp-up, outputs remain disabled until VCC exceeds ~0.5 V, preventing glitch generation. ΔIOFF leakage remains ≤±0.75 μA over VCC = 0–0.2 V, ensuring safe backfeed blocking during brown-out transitions.
Can 74AUP1G332GM,115 drive a 15 pF capacitive load at 3.3 V while staying within timing specs?
Yes: at VCC = 3.3 V and CL = 15 pF, tpd is guaranteed ≤4.2 ns (max) over –40 °C to +125 °C. Measured typical delay is 3.1 ns. The output can source/sink ±4 mA while maintaining VOH ≥2.30 V and VOL ≤0.50 V under these conditions, satisfying standard CMOS fanout requirements.
Is the XSON6 (SOT886) package of 74AUP1G332GM,115 compatible with standard reflow profiles?
Yes-the SOT886 package is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level 1 (unlimited floor life) and supports peak reflow temperatures up to 260 °C. Its 0.5 mm height and 0.35 mm terminal pitch are compatible with standard 0201-class stencil apertures and SPI-based solder paste inspection.
74AUP1G332GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.5ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1G332GM,115 FAQ
1.How can I place an order for 74AUP1G332GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G332GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G332GM,115 reliable?
The price and inventory of 74AUP1G332GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G332GM,115 is usually 5 days.
3.What payment methods are accepted for 74AUP1G332GM,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G332GM,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G332GM,115?
74AUP1G332GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G332GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G332GM,115?
For technical support, including 74AUP1G332GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G332GM,115 requirements.
6.How does Aetrix verify that 74AUP1G332GM,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G332GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G332GM,115 meets industry standards.
7.What is the process for return or replacement of 74AUP1G332GM,115?
All 74AUP1G332GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G332GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G332GM,115 part is unused and in its original packaging.
Return procedure for 74AUP1G332GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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