NXP Semiconductors 74AUP1G332GM,132

Overview

74AUP1G332GM,132 from Nexperia is a single 3-input OR gate with Schmitt-trigger inputs, operating across 0.8 V to 3.6 V supply, delivering ultra-low static current (≤1.4 μA at −40 °C to +125 °C), IOFF-enabled partial power-down protection, and propagation delay as low as 1.2 ns at VCC = 3.6 V with CL = 5 pF. It serves as a noise-immune logic combiner in battery-powered sensor interfaces and low-voltage microcontroller I/O expansion.

For engineers reviewing the 74AUP1G332GM,132 datasheet, 74AUP1G332GM,132 pinout, 74AUP1G332GM,132 application, or 74AUP1G332GM,132 equivalent, this device is selected for its sub-1.5 μA ICC max at full temperature range, guaranteed Schmitt-trigger hysteresis, IOFF backflow prevention, and XSON6 (SOT886) package compatibility with high-density PCB layouts.

Technical Context

This device implements a standard positive-logic 3-input OR function (Y = A + B + C) with Schmitt-trigger input thresholds-VIH ≥ 0.70×VCC and VIL ≤ 0.30×VCC at VCC = 0.8 V-ensuring robust noise rejection on slow-rising signals. Its IOFF circuit actively disables outputs when VCC = 0 V, limiting leakage to ±0.75 μA and preventing reverse current flow into powered subsystems.

Dynamic performance is characterized up to 30 pF load capacitance and supports input transition rates from 0 to 200 ns/V. Propagation delay scales predictably with VCC and CL: e.g., tpd = 2.6 ns (typ) at VCC = 3.3 V, CL = 10 pF, Tamb = 25 °C, and remains ≤4.1 ns (max) across −40 °C to +125 °C.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; thermal pad optional; RoHS-compliant.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-input OR gate applications.

Compared with SN74LVC1G332DBVR, the 74AUP1G332GM,132 delivers 7× lower static current and essential Schmitt noise rejection; versus 74LVC1G332GW,125, it trades solderability for 40% smaller area and superior thermal performance in reflowed high-volume production.

Availability

74AUP1G332GM,132 is available at Aetrix Electronics and suitable for industrial sensor nodes, portable medical devices, automotive body electronics, and smart home hubs requiring stable component supply across extended temperature ranges and ultra-low power budgets.

Supply support for 74AUP1G332GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions, with leadership in advanced packaging and energy-efficient design.

The 74AUP (Advanced Ultra-low Power) product line targets battery-constrained and thermally sensitive applications-such as wearables, IoT edge nodes, and automotive subsystems-where nanowatt static power and robust signal integrity are mandatory.

FAQ

Does the 74AUP1G332GM,132 support mixed-voltage interfacing?

Yes-it accepts input voltages up to 3.6 V regardless of VCC (overvoltage tolerant), enabling safe connection to 3.3 V or 5 V sources while powered from 1.2 V or 1.8 V rails. Output VOH/VOL levels track VCC, so level translation is achieved without external components.

How does the IOFF feature behave during power sequencing?

When VCC drops below 0.2 V, the IOFF circuit forces Y into high-impedance state within nanoseconds, limiting VI/O leakage to ±0.75 μA. This prevents back-current from downstream 3.3 V buses into the unpowered gate, protecting both the IC and upstream drivers during staggered power-down.

Can the Schmitt-trigger inputs be disabled?

No-the Schmitt action is inherent to the input structure and cannot be bypassed or configured. It is always active, providing fixed hysteresis (typically 100–200 mV depending on VCC), which is essential for reliable operation with slow or noisy signals like mechanical switch closures or analog comparator outputs.

What is the maximum capacitive load the output can drive reliably?

The output is characterized up to 30 pF load capacitance with guaranteed timing (tpd ≤ 6.7 ns at VCC = 3.3 V, Tamb = +125 °C). Driving >30 pF may increase propagation delay nonlinearly and raise dynamic power; for heavier loads, add a buffer stage or reduce trace length and parallel capacitance.