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Nexperia USA Inc. 74AUP1G332GW,125
- Part No.:
- 74AUP1G332GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP1G332GW,125.pdf
- Description:
- IC GATE OR 1CH 3-INP 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:6,908
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Product details
Overview
74AUP1G332GW,125 from Nexperia is a single 3-input OR gate with Schmitt-trigger inputs, operating from 0.8 V to 3.6 V supply, delivering ultra-low static current (≤1.4 μA at −40 °C to +125 °C), IOFF-enabled partial power-down protection, and propagation delay as low as 1.1 ns at VCC = 3.0 V with CL = 5 pF. It serves as a noise-immune logic combiner in battery-powered sensor interfaces and low-voltage microcontroller peripheral conditioning circuits.
For engineers reviewing the 74AUP1G332GW,125 datasheet, 74AUP1G332GW,125 pinout, 74AUP1G332GW,125 application, or 74AUP1G332GW,125 equivalent, this device is selected for sub-1.8 V logic interfacing, high-noise industrial I/O conditioning, and space-constrained power-gated subsystems requiring guaranteed input hysteresis and <0.5 μA off-state leakage.
Technical Context
The 74AUP1G332GW,125 implements a true 3-input positive-logic OR function with Schmitt-trigger inputs providing ≥0.3×VCC hysteresis across its full 0.8–3.6 V supply range. Its IOFF circuit actively disables output terminals when VCC = 0 V, blocking backflow current up to ±0.75 μA while tolerating input/output voltages up to 3.6 V independent of supply state.
Dynamic performance is characterized by load-dependent propagation delays: 1.1–3.3 ns (CL = 5 pF) and 1.4–6.7 ns (CL = 30 pF) over −40 °C to +125 °C, with power dissipation capacitance CPD ranging from 2.5 pF (VCC = 0.8 V) to 4.0 pF (VCC = 3.6 V), enabling precise dynamic power estimation via PD = CPD × VCC² × fi × N.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level translation |
| Max ICC (Static) | 1.4 μA at −40 °C to +125 °C - enables multi-year operation in coin-cell-powered IoT endpoints |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents damaging backfeed current during hot-swap or partial system shutdown |
| Propagation Delay (CL = 5 pF) | 1.1 ns (min) to 3.3 ns (max) at VCC = 3.0–3.6 V - ensures timing-critical signal merging in real-time control loops |
| Input Hysteresis | ≥0.3×VCC - rejects >100 mV of slow-edge noise on sensor or switch inputs without external RC filtering |
| ESD Robustness | HBM >5000 V, CDM >1000 V - survives handling and board-level ESD events in unshielded industrial environments |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor drive control boards |
Pinout & Package
TSSOP6 (SOT363-2) package: plastic thin shrink small outline, 6-lead, 1.25 mm body width, 0.65 mm lead pitch, exposed pad optional. Pin 1 index located below marking code in lower-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Data input A | Primary OR input with Schmitt-trigger threshold; accepts 0–3.6 V regardless of VCC state |
| 2 (GND) | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance for noise immunity |
| 3 (B) | Data input B | Secondary OR input with identical hysteresis and voltage tolerance as Pin 1 |
| 4 (Y) | Output Y | Active-high 3-input OR result; drives CMOS loads up to ±4 mA at VCC = 3.0 V |
| 5 (VCC) | Supply voltage | Core logic and output driver supply; IOFF activates automatically when VCC = 0 V |
| 6 (C) | Data input C | Third OR input; fully symmetric with Pins 1 and 3 in timing, threshold, and drive capability |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Guarantees clean switching on slow-rising signals (e.g., mechanical switches, RC-filtered sensors) without oscillation |
| IOFF partial power-down | Disables output and blocks back-current when VCC = 0 V - essential for live-insertion and multi-rail systems |
| Overvoltage-tolerant I/O | Withstands 0–3.6 V on any pin regardless of VCC state - eliminates need for external clamping diodes |
| Ultra-low dynamic power | CPD ≤4.0 pF enables sub-μW dynamic consumption at 1 MHz - critical for always-on wake-up logic |
| JEDEC-compliant voltage ranges | Validated across five JEDEC standards (JESD8-12 through JESD8C) - ensures interoperability with legacy and next-gen logic families |
Applications
| Industrial Sensor Interface | Low-Power Microcontroller Peripherals |
|---|---|
|
Use Scenario: Combining fault signals from three temperature sensors in a motor drive inverter module. IC Role / Device Role / Timing Role: 3-input OR gate aggregating independent overtemperature alerts into a single hardware shutdown line. Use Value: Schmitt-trigger inputs reject EMI-induced glitches on long sensor traces; IOFF prevents backfeed during inverter power-down sequencing. |
Use Scenario: Enabling wake-up interrupt generation from multiple GPIO sources (button, motion sensor, timer) in a wearable health monitor. IC Role / Device Role / Timing Role: Logic OR combiner feeding a single MCU interrupt pin to minimize active-power wake cycles. Use Value: 0.8 V operation allows direct connection to 1.2 V MCU I/O; <1.4 μA ICC extends battery life beyond 5 years in sleep mode. |
| Automotive Body Control Module | IoT Edge Node Power Sequencing |
|
Use Scenario: Merging door-open, trunk-open, and hood-open status signals for vehicle intrusion detection. IC Role / Device Role / Timing Role: Fault-tolerant OR gate driving a dedicated security monitoring circuit with fail-safe behavior. Use Value: −40 °C to +125 °C rating ensures reliability in under-dash mounting; 3.6 V tolerant inputs interface directly with 5 V sensor outputs via resistive dividers. |
Use Scenario: Controlling enable sequencing of RF transceiver, memory, and sensor subsystems in a LoRaWAN node. IC Role / Device Role / Timing Role: Power-domain OR gate asserting "system ready" only after all regulated rails are stable. Use Value: IOFF isolates downstream logic during brown-out recovery; low propagation delay (<3.3 ns) avoids timing violations in fast-ramping supplies. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 3-input OR gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G332DBVR | Higher ICC (max 10 μA), no Schmitt inputs, 1.65–5.5 V supply range | Lacks noise immunity on slow edges; requires external hysteresis for switch debouncing | Select when interfacing with 5 V logic and noise environment is controlled |
| 74LVC1G32GV,125 | 2-input OR only; same package, supply, and temperature range; no IOFF | Requires external logic duplication for 3-input function; no power-down isolation | Choose only if design can accommodate cascaded 2-input gates and IOFF is unnecessary |
Compared with SN74LVC1G332DBVR and 74LVC1G32GV,125, the 74AUP1G332GW,125 uniquely delivers Schmitt-trigger noise rejection, IOFF-enabled power-domain isolation, and sub-2 μA static current - making it the sole choice for ultra-low-power, noise-prone, or partial-power-down systems.
Availability
74AUP1G332GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, battery-powered wearables, and automotive body control modules requiring stable component supply across extended temperature and voltage ranges.
Supply support for 74AUP1G332GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) product line targets energy-constrained applications demanding sub-microamp static current, wide-VCC operation, and robust IO behavior - specifically engineered for always-on sensing, portable electronics, and power-gated subsystems.
FAQ
Does the 74AUP1G332GW,125 support mixed-voltage interfacing?
Yes - its inputs tolerate 0–3.6 V regardless of VCC level, and outputs swing rail-to-rail (0 V to VCC). This allows safe connection to higher-voltage peripherals (e.g., 3.3 V sensors) when VCC = 1.8 V, provided input current remains within ±20 μA limits specified in the datasheet.
How does IOFF behave during power sequencing?
When VCC drops to 0 V, the IOFF circuit automatically disables the output driver and presents high-impedance on Y, limiting leakage to ±0.75 μA. This prevents back-current flow from powered downstream logic into the unpowered gate - critical for hot-plug and multi-rail architectures.
Can Schmitt-trigger inputs eliminate external RC debounce networks?
Yes - with typical hysteresis ≥0.3×VCC (e.g., ~0.5 V at VCC = 1.8 V), the inputs reliably suppress bounce on mechanical switches and noisy sensor outputs without external components, reducing BOM count and PCB area in space-constrained designs.
What is the maximum capacitive load the output can drive reliably?
The output is characterized up to 30 pF load capacitance with guaranteed timing (tpd ≤6.7 ns at VCC = 3.0 V). For loads >30 pF, propagation delay increases linearly; slew rate remains controlled (<10% overshoot/undershoot), but timing margins must be re-verified per application.
74AUP1G332GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- OR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Features:
- -
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 5.5ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
74AUP1G332GW,125 FAQ
1.How can I place an order for 74AUP1G332GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G332GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G332GW,125 reliable?
The price and inventory of 74AUP1G332GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G332GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G332GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G332GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G332GW,125?
74AUP1G332GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G332GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G332GW,125?
For technical support, including 74AUP1G332GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G332GW,125 requirements.
6.How does Aetrix verify that 74AUP1G332GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G332GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G332GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G332GW,125?
All 74AUP1G332GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G332GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G332GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G332GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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