Nexperia USA Inc. 74AUP1G34GM,132
- Part No.:
- 74AUP1G34GM,132
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G34GM,132.pdf
- Description:
- IC BUFFER NON-INVERT 3.6V 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:2,595
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Product details
Overview
74AUP1G34GM,132 from Nexperia is a single low-power CMOS buffer with Schmitt-trigger inputs, designed for signal conditioning in ultra-low-voltage digital systems. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 25 °C, supports partial power-down via IOFF, and is rated for −40 °C to +125 °C. It enables robust level-shifting and noise-immune signal buffering in space-constrained portable electronics.
For engineers reviewing the 74AUP1G34GM,132 datasheet, 74AUP1G34GM,132 pinout, 74AUP1G34GM,132 application, or 74AUP1G34GM,132 equivalent, this device is selected for its sub-1-μA static current, overvoltage-tolerant 3.6 V inputs, <10% VCC output overshoot/undershoot, and guaranteed operation down to 0.8 V - critical for battery-powered IoT sensor nodes and wearables.
Technical Context
The 74AUP1G34GM implements a non-inverting buffer function with hysteresis (Schmitt-trigger input), enabling reliable operation with slow-rising or noisy signals. Its IOFF circuit actively disables outputs when VCC = 0 V, blocking backflow current during partial power-down sequences in multi-rail systems.
It complies with JEDEC standards JESD8-12 through JESD8C across five voltage bands and meets HBM ESD >5000 V and CDM >1000 V. Propagation delay ranges from 1.4 ns (VCC = 3.6 V, CL = 5 pF) to 32.1 ns (VCC = 0.8 V, CL = 30 pF), supporting both high-speed interface conditioning and ultra-low-power wake-up signal routing.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interfacing with 0.9 V logic, 1.2 V cores, 1.8 V I/O, and 3.3 V peripherals without level shifters. |
| Max ICC (Static) | 0.9 μA at 25 °C - ensures negligible battery drain in always-on sensor monitoring circuits. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents cross-rail current injection during sleep mode in mixed-voltage SoC subsystems. |
| Input Hysteresis | Typical ΔVIH/VIL ≈ 0.2×VCC - rejects noise up to ±100 mV on 1.2 V rails, eliminating false triggering in automotive body control modules. |
| Propagation Delay | 1.4 ns (VCC = 3.6 V, CL = 5 pF) - supports clean signal routing in 500+ MHz clock domain boundary applications. |
| Output Drive | ±4.0 mA at VCC = 3.0 V - sufficient to drive 10-cm PCB traces or two 74AUP inputs without added fanout buffers. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive ECUs and industrial motor drives. |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; side-wettable flanks not present; thermal pad absent.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A (Input) | Single data input with Schmitt-trigger threshold; accepts 0–3.6 V regardless of VCC, enabling level translation. |
| 2 | n.c. (Not Connected) | No internal connection; must be left floating or tied to GND for mechanical stability - no electrical function. |
| 3 | GND | Digital ground reference; primary return path for input/output current and supply decoupling. |
| 4 | n.c. (Not Connected) | No internal connection; electrically isolated; may serve as mechanical anchor but carries no signal or power. |
| 5 | VCC | Core supply input; powers internal logic and output stage; requires local 100 nF ceramic decoupling. |
| 6 | Y (Output) | Inverting-buffered output; rail-to-rail swing (VOL ≤ 0.5 V, VOH ≥ 2.3 V at 3.0 V); drives capacitive loads ≤30 pF. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 0.9 μA max ensures <1 μW quiescent dissipation at 1.2 V - ideal for energy-harvesting sensor transceivers. |
| IOFF partial power-down | Blocks bidirectional current flow when VCC = 0 V, enabling hot-swap capability and safe multi-supply sequencing. |
| Overvoltage-tolerant inputs | Accepts VI up to 3.6 V independent of VCC, allowing direct connection to 3.3 V buses while powered from 1.2 V rails. |
| Low-noise switching | Overshoot/undershoot <10% of VCC minimizes EMI in EMC-sensitive medical wearable designs. |
| Wide temperature range | Specified from −40 °C to +125 °C supports deployment in engine control units and outdoor industrial gateways. |
Applications
| Automotive Body Control Module | IoT Sensor Node Interface |
|---|---|
Use Scenario: Signal conditioning for door lock actuator feedback sensors operating on 1.2 V MCU rails with 3.3 V analog front-end outputs. IC Role / Device Role / Timing Role: Level-translating buffer isolating noisy 3.3 V sensor signals into noise-immune 1.2 V logic domains using Schmitt-trigger hysteresis. Use Value: Eliminates external RC filters and reduces BOM count by enabling direct interface between disparate voltage domains. | Use Scenario: Wake-up signal routing in battery-powered environmental sensor node with BLE SoC and MEMS accelerometer. IC Role / Device Role / Timing Role: Low-leakage buffer driving interrupt line from accelerometer to SoC deep-sleep core, active only during motion detection events. Use Value: Extends battery life beyond 5 years by limiting standby current to <1 μA while maintaining fast edge response for wake-up latency <10 μs. |
| Industrial PLC Input Conditioning | Portable Medical Device Logic Isolation |
Use Scenario: Debouncing and noise filtering of 24 V discrete input signals translated to 3.3 V logic for microcontroller polling. IC Role / Device Role / Timing Role: Schmitt-trigger buffer providing hysteresis-based immunity against EFT bursts and conducted noise on factory floor wiring. Use Value: Replaces discrete RC+Schmitt circuits, reducing board area by 60% and improving long-term reliability in harsh environments. | Use Scenario: Isolating ECG electrode signal path enable lines from main processor in Class II certified wearable monitor. IC Role / Device Role / Timing Role: Safety-isolating logic-level control signal between patient-connected analog section and digital processing unit. Use Value: Meets IEC 60601 creepage/clearance requirements via XSON6's compact footprint and eliminates optocoupler latency and power overhead. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| 74LVC1G34GW,125 | Higher ICC (max 4 μA), no IOFF, narrower VCC range (1.65–5.5 V), TSSOP5 package (larger footprint). | Not suitable for partial power-down or sub-1.65 V operation; better for legacy 3.3 V/5 V systems. | Select only if IOFF and 0.8 V operation are unnecessary and TSSOP5 assembly is preferred. |
| SN74AUP1G34DSFR | Identical electrical specs; same IOFF, VCC range, and Schmitt input; X2SON4 package (4-pin, 0.6×0.6 mm). | Lower pin count simplifies layout but removes one n.c. terminal used for mechanical anchoring in high-vibration environments. | Prefer for ultra-dense layouts where size is critical and mechanical robustness is secondary. |
Compared with 74LVC1G34GW,125, the 74AUP1G34GM,132 enables true 0.8 V operation and safe multi-rail shutdown; compared with SN74AUP1G34DSFR, it offers superior mechanical stability via dual n.c. pins - critical for automotive under-hood placement.
Availability
74AUP1G34GM,132 is available at Aetrix Electronics and suitable for battery-powered IoT devices, automotive body electronics, industrial PLC input stages, and portable medical monitors requiring stable component supply across extended temperature and ultra-low-power constraints.
Supply support for 74AUP1G34GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance, reliable, and scalable components for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-voltage, ultra-low-power digital signal conditioning - specifically engineered for energy-constrained edge devices and multi-rail systems requiring partial power-down capability.
FAQ
What is the maximum allowable input voltage when VCC = 0 V?
The 74AUP1G34GM,132 allows input voltages up to 3.6 V even when unpowered (VCC = 0 V), per Absolute Maximum Ratings Table 5. This overvoltage tolerance enables safe hot-plug operation and prevents latch-up during power sequencing in multi-supply systems.
Does the device support true bidirectional signal routing?
No - the 74AUP1G34GM,132 is a unidirectional non-inverting buffer (A → Y only). It lacks enable/disable control or bus-hold functionality. For bidirectional applications, discrete MOSFET switches or dedicated bus transceivers like 74AUP2G241 must be used.
Can the n.c. pins be grounded or left floating in PCB layout?
Both n.c. pins (2 and 4) are electrically isolated and may be left floating. However, grounding them improves mechanical anchoring and thermal dissipation in high-vibration environments such as automotive chassis mounting - confirmed in Nexperia's SOT886 land pattern recommendations.
How does IOFF behavior differ from standard high-impedance tri-state?
IOFF actively disables the output structure when VCC = 0 V, blocking both sourcing and sinking current paths. Unlike tri-state, which requires an active control signal and functional VCC, IOFF operates passively during complete power loss - preventing backfeed into powered rails in partial-shutdown configurations.
74AUP1G34GM,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1G34GM,132 FAQ
1.How can I place an order for 74AUP1G34GM,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G34GM,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G34GM,132 reliable?
The price and inventory of 74AUP1G34GM,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G34GM,132 is usually 5 days.
3.What payment methods are accepted for 74AUP1G34GM,132?
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4.How is shipping managed for 74AUP1G34GM,132?
74AUP1G34GM,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G34GM,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G34GM,132?
For technical support, including 74AUP1G34GM,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G34GM,132 requirements.
6.How does Aetrix verify that 74AUP1G34GM,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G34GM,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G34GM,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1G34GM,132?
All 74AUP1G34GM,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G34GM,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G34GM,132 part is unused and in its original packaging.
Return procedure for 74AUP1G34GM,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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