NXP Semiconductors 74AUP1G374GF,132
- Part No.:
- 74AUP1G374GF,132
- Manufacturer:
- NXP Semiconductors
- Category:
- Flip Flops
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G374GF,132.pdf
- Description:
- IC F-F D-TYPE POS EDGE 6-XSON
- Quantity:
- Payment:

- Shipping:

Inventory:50,300
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Product details
Overview
74AUP1G374GF,132 from Nexperia is a single low-power D-type flip-flop with positive-edge clock trigger and 3-state output enable (active LOW). It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 25 °C, supports −40 °C to +125 °C ambient, and features IOFF circuitry for partial power-down protection in battery-powered IoT sensor nodes.
For engineers reviewing the 74AUP1G374GF,132 datasheet, 74AUP1G374GF,132 pinout, 74AUP1G374GF,132 application, or 74AUP1G374GF,132 equivalent, key selection criteria include its ultra-low static current, Schmitt-trigger inputs for noise immunity on slow-rising control signals, 3-state bus isolation capability, and compatibility with mixed-voltage logic domains in portable embedded systems.
Technical Context
This device implements a synchronous edge-triggered storage element with independent output enable control - enabling precise timing of data latching while allowing dynamic bus contention avoidance. Its IOFF circuit actively disables outputs when VCC = 0 V, blocking backflow current during power sequencing.
Schmitt-trigger inputs tolerate input rise/fall times up to 200 ns/V, making it robust against noisy or slew-limited control lines. The flip-flop's propagation delay ranges from 1.2 ns (VCC = 3.3 V, CL = 5 pF) to 40.8 ns (VCC = 0.8 V, CL = 30 pF), supporting both high-speed register transfer and low-power wake-up synchronization.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic families without level shifters. |
| Max ICC (Static) | 0.9 μA at 25 °C - reduces quiescent power in always-on subsystems such as real-time clock supervisors or sensor wake controllers. |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents damaging back-current during hot-swap or partial power-down sequences in modular electronics. |
| Propagation Delay (tpd) | 1.2 ns typical at VCC = 3.3 V, CL = 5 pF - supports >500 MHz clock operation in high-speed data capture paths. |
| Set-up Time (tsu) | 0.2 ns minimum HIGH-level at VCC = 3.3 V - accommodates tight timing margins in FPGA-to-ASIC glue logic interfaces. |
| ESD Rating | HBM >5000 V, CDM >1000 V - ensures robustness during PCB handling and in-field operation in industrial environments. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive modules, motor drive control boards, and outdoor telecom equipment. |
Pinout & Package
XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6-terminal, 1.0 × 1.45 × 0.5 mm body. Pin 1 index located at lower-left corner below marking code.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (CP) | Clock input | LOW-to-HIGH edge-triggered; Schmitt-triggered for noise immunity on slow-rising system clocks or debounced push-button inputs. |
| 2 (GND) | Ground reference | 0 V return path for all internal logic and I/O; must be low-impedance to maintain noise margin and timing integrity. |
| 3 (D) | Data input | Asynchronous data source synchronized to CP edge; accepts voltage levels compliant with VIH/VIL across full VCC range. |
| 4 (Q) | 3-state output | Driven HIGH/LOW when OE = LOW; enters high-impedance state when OE = HIGH - enables shared-bus arbitration. |
| 5 (VCC) | Supply voltage | Primary power rail; powers internal logic and output drivers; supports dynamic voltage scaling down to 0.8 V. |
| 6 (OE) | Output enable (active LOW) | Controls Q output state independently of CP/D; allows latch-and-hold functionality without clocking. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 0.9 μA max ensures <1 μW standby dissipation at 1.8 V - critical for coin-cell–powered wearables. |
| IOFF partial power-down | Blocks back-current when VCC = 0 V, enabling safe insertion/removal in live-backplane systems like modular PLC I/O cards. |
| Schmitt-trigger inputs | Input hysteresis rejects noise up to 30 % of VCC, eliminating need for external RC filtering on reset or interrupt lines. |
| Overvoltage-tolerant inputs | Accepts 3.6 V signals even at VCC = 0.8 V - simplifies level translation in multi-rail microcontroller peripherals. |
| JEDEC-compliant packaging | SOT886 footprint meets MO-252 standard, enabling automated optical inspection and high-yield reflow assembly. |
Applications
| Industrial Sensor Interface | Portable Medical Device |
|---|---|
Use Scenario: Isolating analog-to-digital converter (ADC) output data bus during multiplexed sampling cycles in a programmable logic controller (PLC) analog input module. IC Role / Device Role / Timing Role: Latches ADC conversion result on CP edge and gates Q onto shared data bus only when OE asserts, preventing bus contention between multiple ADC channels. Use Value: Enables deterministic readout timing with zero bus turnaround delay, reducing sampling jitter by eliminating tri-state arbitration overhead. | Use Scenario: Synchronizing low-power motion sensor interrupts to a sleep-wake controller in a Bluetooth-enabled ECG patch. IC Role / Device Role / Timing Role: Captures asynchronous accelerometer interrupt pulses on CP edge and holds stable logic level until MCU wakes and reads Q via OE-controlled bus access. Use Value: Eliminates missed interrupts during deep-sleep mode by providing glitch-free edge capture and retention without active clocking. |
| Automotive Body Control Module | IoT Edge Node |
Use Scenario: Debouncing and synchronizing door-lock actuator feedback signals in a CAN-connected body control unit operating across −40 °C to +125 °C. IC Role / Device Role / Timing Role: Filters mechanical switch bounce using Schmitt-triggered D input and provides metastability-hardened latch aligned to system clock domain before CAN message generation. Use Value: Reduces false lock/unlock events by >99.9 % compared to RC+GPIO solutions, validated over full automotive temperature range. | Use Scenario: Level-shifting and buffering GPIO signals between a 1.8 V ultra-low-power microcontroller and a 3.3 V LoRa transceiver in a solar-powered environmental monitor. IC Role / Device Role / Timing Role: Accepts 1.8 V logic from MCU, drives 3.3 V–tolerant transceiver inputs, and isolates domains using OE during MCU sleep. Use Value: Removes need for discrete level translators and saves 0.3 mm² PCB area versus dual-buffer solution while maintaining signal integrity. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G374DBVR | Higher ICC (10 μA typ), wider VCC (1.65 V–5.5 V), no IOFF, no Schmitt inputs | Lacks partial power-down support and noise immunity on slow edges; requires external filtering for mechanical switch inputs | Prefer when interfacing with 5 V legacy peripherals and power efficiency is secondary to voltage range. |
| 74LVC1G74GW,125 | Dual-edge triggered (set/reset), no 3-state output, no IOFF, higher tpd (≥3.5 ns) | Cannot isolate bus or support hot-swap; unsuitable for shared-data-path architectures requiring tri-state control | Select only for basic set/reset latch functions where bus sharing or power sequencing is not required. |
Compared with SN74LVC1G374DBVR and 74LVC1G74GW,125, the 74AUP1G374GF,132 uniquely combines sub-μA static current, IOFF protection, and Schmitt-triggered inputs - making it the only choice for energy-constrained, noise-prone, or hot-pluggable applications demanding guaranteed bus isolation and robust edge detection.
Availability
74AUP1G374GF,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical devices, automotive body control modules, and IoT edge nodes requiring stable component supply across extended temperature and low-power design constraints.
Supply support for 74AUP1G374GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable components for automotive, industrial, mobile, and computing markets, with leadership in logic, MOSFETs, and ESD protection.
The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and thermally constrained systems, emphasizing nanowatt static power, wide VCC scalability, and robust signal integrity - directly addressing design needs in wearable electronics and smart sensors.
FAQ
What is the maximum clock frequency supported by the 74AUP1G374GF,132?
The device achieves up to 619 MHz maximum clock frequency at VCC = 3.3 V and CL = 5 pF, dropping to 309 MHz at CL = 30 pF. At lower voltages, fmax scales down - e.g., 481 MHz at VCC = 3.0 V (CL = 5 pF) and 181 MHz at VCC = 1.2 V (CL = 5 pF). These values are measured under specified test conditions per Figure 7 and Table 8.
Does the 74AUP1G374GF,132 support partial power-down when VCC is disconnected?
Yes - its IOFF circuitry actively disables outputs when VCC = 0 V, limiting OFF-state leakage to ±0.75 μA. This prevents back-current flow through the device when connected to a live bus, satisfying IEC 61000-4-2 and automotive hot-swap requirements without external protection diodes.
How does the Schmitt-trigger input improve noise immunity in real-world applications?
Schmitt-trigger action provides ~30 % hysteresis (e.g., VIH ≈ 0.65×VCC, VIL ≈ 0.35×VCC at 1.8 V), rejecting noise spikes and slow-rising signals that would cause multiple transitions on standard CMOS inputs. This eliminates need for external RC filters on mechanical switch inputs or long PCB traces in industrial control panels.
Can the 74AUP1G374GF,132 operate reliably at 0.8 V supply voltage?
Yes - it is fully characterized from 0.8 V to 3.6 V, with guaranteed tpd ≤ 40.8 ns (CL = 30 pF), tsu ≥ 0.5 ns, and ICC ≤ 1.4 μA at −40 °C to +125 °C. At 0.8 V, VOH remains ≥ 0.70×VCC and VOL ≤ 0.30×VCC, ensuring interoperability with other 0.8 V logic families in ultra-low-power SoC subsystems.
74AUP1G374GF,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Bulk
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Tri-State, Non-Inverted
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 5.8ns @ 3.3V, 30pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 0.8 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT891 (1x1)
74AUP1G374GF,132 FAQ
1.How can I place an order for 74AUP1G374GF,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G374GF,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G374GF,132 reliable?
The price and inventory of 74AUP1G374GF,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G374GF,132 is usually 5 days.
3.What payment methods are accepted for 74AUP1G374GF,132?
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4.How is shipping managed for 74AUP1G374GF,132?
74AUP1G374GF,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G374GF,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G374GF,132?
For technical support, including 74AUP1G374GF,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G374GF,132 requirements.
6.How does Aetrix verify that 74AUP1G374GF,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G374GF,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G374GF,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1G374GF,132?
All 74AUP1G374GF,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G374GF,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G374GF,132 part is unused and in its original packaging.
Return procedure for 74AUP1G374GF,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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