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Nexperia USA Inc. 74AUP1G374GW,125
- Part No.:
- 74AUP1G374GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP1G374GW,125.pdf
- Description:
- IC FF D-TYPE SNGL 1BIT 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:30,147
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Product details
Overview
74AUP1G374GW,125 from Nexperia is a single low-power D-type flip-flop with positive-edge clock triggering and 3-state output enable (active LOW). It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, supports -40 °C to +125 °C ambient, and features IOFF circuitry for partial power-down protection in battery-backed or hot-swap systems.
For engineers reviewing the 74AUP1G374GW,125 datasheet, 74AUP1G374GW,125 pinout, 74AUP1G374GW,125 application, or 74AUP1G374GW,125 equivalent, key selection criteria include its ultra-low static current, Schmitt-trigger input tolerance for slow-rising signals, guaranteed tpd ≤3.6 ns at 3.0 V/CL=5 pF, IOFF-enabled backflow prevention, and TSSOP6 (SOT363-2) package compatibility with high-density PCB layouts.
Technical Context
This device implements a synchronous edge-triggered storage element with asynchronous 3-state control: data at D is latched on the LOW-to-HIGH transition of CP, while OE (pin 6) independently enables or disables Q (pin 4) without affecting internal state. The Schmitt-trigger inputs provide hysteresis (typically 0.3 V at VCC = 3.3 V), enabling robust operation with noisy or slow-transition logic sources.
Its IOFF circuitry actively isolates I/O terminals when VCC = 0 V, limiting backflow current to ±0.75 μA maximum - critical for multi-rail systems where one supply may be powered down while others remain active. All DC and AC specifications are fully characterized from -40 °C to +125 °C, including fmax = 510 MHz at VCC = 3.3 V/CL = 5 pF and tsu(H) = 0.6 ns under same conditions.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - Enables direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (125 °C) | 0.9 μA - Ensures negligible quiescent power draw in always-on subsystems like real-time clocks or sensor wake-up logic. |
| tpd (CP to Q) | ≤3.6 ns at VCC = 3.0 V, CL = 5 pF - Supports >270 MHz data capture in high-speed serial link buffers or timing-critical control paths. |
| IOFF Leakage | ±0.75 μA max at VCC = 0 V - Prevents destructive back-current during partial power-down, satisfying JEDEC JESD78 Class II latch-up immunity. |
| Input Hysteresis | Typ. 0.3 V at VCC = 3.3 V - Accepts slow-rising signals (Δt/ΔV up to 200 ns/V) without metastability in noisy industrial environments. |
| Operating Temperature | -40 °C to +125 °C - Qualified for under-hood automotive, industrial motor drives, and outdoor telecom equipment. |
| ESD Robustness | HBM >5000 V, CDM >1000 V - Reduces need for external protection in handheld and portable designs. |
Pinout & Package
TSSOP6 plastic thin shrink small outline package (SOT363-2), 6-lead, body width 1.25 mm, pin 1 indicator located below marking code in lower-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 - CP | Clock input | LOW-to-HIGH edge-triggered; Schmitt-triggered for noise immunity; minimum pulse width 0.7 ns at 3.3 V. |
| 2 - GND | Ground reference | 0 V return path for all internal logic and I/O; must be low-impedance for stable switching performance. |
| 3 - D | Data input | Sampled on CP rising edge; requires setup time tsu(H) ≥0.6 ns and hold time th ≥0 ns at VCC = 3.3 V. |
| 4 - Q | 3-state output | Driven HIGH/LOW when OE = LOW; enters high-impedance (Z) when OE = HIGH; supports bus-sharing topologies. |
| 5 - VCC | Supply voltage | Power rail for core logic and output drivers; decoupling capacitor (100 nF) recommended within 5 mm. |
| 6 - OE | Output enable (active LOW) | Asynchronous control: Q goes to Z within tdis ≤4.0 ns (VCC = 3.3 V); no effect on internal flip-flop state. |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤0.9 μA max at +125 °C ensures <1 μW standby dissipation - ideal for energy-harvesting nodes. |
| IOFF partial power-down | Active isolation of I/O pins at VCC = 0 V prevents backfeed into powered rails - essential for hot-plug and multi-voltage SoC interconnects. |
| Schmitt-trigger inputs | Input hysteresis ≥0.25 × VCC enables reliable sampling of slow or noisy signals without external conditioning. |
| Wide temperature range | Full functionality from -40 °C to +125 °C meets AEC-Q100 Grade 1 requirements for automotive infotainment and ADAS modules. |
| JEDEC-compliant voltage ranges | Validated per JESD8-12 (0.8–1.3 V), JESD8-11 (0.9–1.65 V), JESD8-7 (1.65–1.95 V), JESD8-5 (2.3–2.7 V), JESD8C (2.7–3.6 V). |
Applications
| Industrial PLC I/O Expansion | Automotive Body Control Module |
|---|---|
Use Scenario: Isolating microcontroller GPIOs from high-noise 24 V fieldbus lines using level-shifted, buffered signals. IC Role / Device Role / Timing Role: Edge-triggered data latch synchronizing asynchronous sensor interrupts to MCU clock domain while providing 3-state isolation during bus arbitration. Use Value: Eliminates need for discrete level shifters and pull-up networks; IOFF prevents backfeed when MCU is in deep sleep and 24 V bus remains active. | Use Scenario: Managing LED driver enable signals in headlight control units where multiple voltage domains coexist. IC Role / Device Role / Timing Role: Synchronizing PWM dimming commands from 3.3 V MCU to 5 V LED driver ICs, with OE used for dynamic channel blanking. Use Value: Schmitt-trigger inputs tolerate EMI-induced ringing on long harness traces; 125 °C rating ensures reliability near engine compartments. |
| Portable Medical Sensor Hub | 5G Small Cell Baseband Timing |
Use Scenario: Latching biopotential amplifier outputs before ADC sampling in battery-powered ECG monitors. IC Role / Device Role / Timing Role: Low-power D flip-flop capturing analog front-end data at precise clock edges, with OE used to gate output during low-power idle cycles. Use Value: 0.9 μA max ICC extends battery life beyond 5 years in implantable-grade devices; small TSSOP6 footprint saves PCB area. | Use Scenario: Aligning baseband data streams between FPGA and RF transceiver in millimeter-wave small cell radios. IC Role / Device Role / Timing Role: Synchronizing parallel data lanes to a common clock domain while supporting dynamic lane disable via OE for power gating. Use Value: 3.6 ns tpd at 3.3 V enables sub-3 ns jitter accumulation across multi-stage pipeline registers; IOFF protects transceiver during FPGA reconfiguration. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G374DBVR | Higher ICC (10 μA typ), wider VCC (1.65–5.5 V), no IOFF, no Schmitt inputs | Lacks partial power-down capability and noise immunity; requires clean, fast-rising clocks | Select only if operating above 1.65 V and system-level backfeed protection is handled externally |
| 74LVC1G74GW,125 | Set/reset functionality, dual-edge clocking option, higher propagation delay (≥5.5 ns), no 3-state output | Provides asynchronous control but cannot share buses; unsuitable for multiplexed data paths | Choose when master-slave synchronization or reset-dominant behavior is required over bus isolation |
Compared with SN74LVC1G374DBVR and 74LVC1G74GW,125, the 74AUP1G374GW,125 uniquely combines ultra-low ICC, IOFF, Schmitt inputs, and 3-state output in a single TSSOP6 package - making it the only choice for space-constrained, multi-rail, noise-prone applications demanding zero-backflow and sub-1 μA standby.
Availability
74AUP1G374GW,125 is available at Aetrix Electronics and suitable for industrial PLC I/O expansion, automotive body control modules, and portable medical sensor hubs requiring stable component supply across extended temperature and voltage ranges.
Supply support for 74AUP1G374GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable components for automotive, industrial, mobile, and computing markets, with leadership in logic, MOSFETs, and ESD protection.
The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and thermally constrained systems, emphasizing sub-1 μA static current, wide VCC scalability, and robust IOFF behavior for mixed-voltage domain interoperability.
FAQ
What is the absolute maximum supply voltage for 74AUP1G374GW,125?
The absolute maximum VCC is +4.6 V, but operation above 3.6 V violates JEDEC compliance and may cause parametric drift or accelerated aging. Recommended operating range remains 0.8 V to 3.6 V per datasheet Table 6; sustained use at 4.6 V voids warranty and risks permanent damage.
Does 74AUP1G374GW,125 support hot insertion?
Yes - its IOFF circuitry actively disables I/O terminals when VCC = 0 V, limiting backflow current to ±0.75 μA max. This satisfies hot-swap requirements in modular systems where boards are inserted into live backplanes, provided OE is held HIGH during insertion to maintain Q in high-impedance state.
Can the Schmitt-trigger inputs accept 5 V signals?
No - inputs tolerate up to 3.6 V absolute maximum (Table 5), and VIH/VIL thresholds scale with VCC (e.g., VIH = 2.0 V min at VCC = 3.0 V). Applying 5 V directly exceeds rating and risks latch-up; a level-shifter or resistor divider is mandatory for interfacing with 5 V logic.
Is the TSSOP6 package RoHS and REACH compliant?
Yes - the 74AUP1G374GW,125 in SOT363-2 packaging meets RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006, with lead-free terminations and halogen-free molding compound. Certificate of Compliance is available upon request from Nexperia's official portal.
74AUP1G374GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Tri-State, Non-Inverted
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 5.8ns @ 3.3V, 30pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 0.8 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
74AUP1G374GW,125 FAQ
1.How can I place an order for 74AUP1G374GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G374GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G374GW,125 reliable?
The price and inventory of 74AUP1G374GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G374GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G374GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G374GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G374GW,125?
74AUP1G374GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G374GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G374GW,125?
For technical support, including 74AUP1G374GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G374GW,125 requirements.
6.How does Aetrix verify that 74AUP1G374GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G374GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G374GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G374GW,125?
All 74AUP1G374GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G374GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G374GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G374GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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