Nexperia USA Inc. 74AUP1G386GM,132

Overview

74AUP1G386GM,132 from Nexperia is a single 3-input EXCLUSIVE-OR gate in XSON6 (SOT886) package with Schmitt-trigger inputs, operating from 0.8 V to 3.6 V supply, delivering propagation delay as low as 1.3 ns at 3.6 V/CL = 5 pF, and featuring IOFF partial power-down protection for system-level hot-swap and bus-hold integrity in battery-powered IoT sensor nodes.

For engineers reviewing the 74AUP1G386GM,132 datasheet, 74AUP1G386GM,132 pinout, 74AUP1G386GM,132 application, or 74AUP1G386GM,132 equivalent, this device serves as a low-voltage logic combiner in power-constrained edge devices where input noise immunity, ultra-low static current (<0.9 μA), and overvoltage-tolerant 3.6 V inputs are required across industrial temperature range (–40 °C to +125 °C).

Technical Context

This device implements standard XOR logic (Y = A ⊕ B ⊕ C) with Schmitt-trigger inputs that tolerate slow-rising signals and reject high-frequency noise-critical in noisy industrial control signal conditioning. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

Designed for multi-rail systems, it supports mixed-voltage interfacing: inputs tolerate up to 3.6 V regardless of VCC (0.8–3.6 V), and output VOH/VOL specs are guaranteed down to 0.8 V supply. Dynamic performance scales with VCC and load capacitance, with tpd ranging from 1.3 ns (3.6 V, 5 pF) to 23.4 ns (0.8 V, 5 pF).

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886), no leads, 6 terminals, body dimensions 1.0 × 1.45 × 0.5 mm, thermal pad exposed on bottom, pin 1 index located at lower-left corner below marking code "aH".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 3-input XOR gate applications.

Compared with SN74LVC1G386DBVR and 74AHC1G386GW,125, the 74AUP1G386GM,132 uniquely combines sub-1 μA static current, Schmitt-trigger noise immunity, IOFF protection, and 0.8 V operation-making it the only option for energy-harvesting and battery-critical designs requiring robust mixed-voltage logic.

Availability

74AUP1G386GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, low-power wearable logic, automotive body control modules, and USB-C power delivery sequencing requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AUP1G386GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions for automotive, industrial, and mobile markets.

The 74AUP (Advanced Ultra-low Power) product line delivers sub-1 μA logic gates optimized for battery-powered and energy-efficient systems-designed specifically for IoT edge nodes, wearables, and automotive subsystems demanding ultra-low static power and robust noise immunity.

FAQ

Does the 74AUP1G386GM,132 support true 0.8 V operation with full logic functionality?

Yes. The device is fully specified at VCC = 0.8 V across –40 °C to +125 °C, with VIH = 0.70 × VCC (0.56 V min), VIL = 0.30 × VCC (0.24 V max), and tpd = 23.4 ns (CL = 5 pF). All DC and AC parameters meet datasheet limits at this voltage, enabling direct integration with 0.8 V-core processors and energy-harvesting PMUs.

How does the IOFF feature behave when VCC is ramping or partially powered?

IOFF activates only when VCC falls to 0 V (±0.2 V). During power ramp-up or brownout (e.g., VCC = 0.3 V), the output remains functional but may exhibit undefined logic states. For controlled power sequencing, use external reset or enable logic to hold inputs static until VCC stabilizes above 0.8 V.

Can Pin 1 (A) be left floating in a design?

No. All inputs-including A, B, and C-must be actively driven HIGH or LOW. Floating inputs cause excessive ICC, unpredictable output states, and potential latch-up due to internal Schmitt-trigger metastability. Use pull-up/pull-down resistors (≤100 kΩ) if signal sources are open-drain or inactive.

Is the XSON6 (SOT886) package compatible with standard reflow profiles for lead-free assembly?

Yes. The SOT886 package is qualified for IPC/JEDEC J-STD-020D reflow, with peak temperature up to 260 °C for ≤30 seconds. Its 0.5 mm profile and thermal pad require controlled solder paste volume (0.12–0.15 mm stencil) and preheat ramp rate ≤3 °C/s to prevent tombstoning or voiding.