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Nexperia USA Inc. 74AUP1G38GF,132

Part No.:
74AUP1G38GF,132
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G38GF,132.pdf
Description:
IC GATE NAND 1CH 2-INP 6XSON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:1,016

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Product details

Overview

74AUP1G38GF,132 from Nexperia is a single 2-input NAND gate with open-drain output, Schmitt-trigger inputs, and IOFF partial power-down capability. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, supports −40 °C to +125 °C ambient, and features <10% VCC overshoot/undershoot for noise-immune signal conditioning in level-shifting I²C bus interfaces.

For engineers reviewing the 74AUP1G38GF,132 datasheet, 74AUP1G38GF,132 pinout, 74AUP1G38GF,132 application, or 74AUP1G38GF,132 equivalent, this device serves as a low-power logic buffer for voltage translation, wired-AND bus control, and power-aware peripheral enable sequencing where static current, input hysteresis, and IOFF isolation are critical selection criteria.

Technical Context

The 74AUP1G38GF,132 implements a single 2-input NAND function with true open-drain output-no internal pull-up-requiring external termination. Its Schmitt-trigger inputs provide ≥0.3×VCC hysteresis (e.g., 0.9 V at VCC = 3.0 V), enabling robust operation with slow-rising signals up to 200 ns/V transition rate.

IOFF circuitry actively disables output leakage when VCC = 0 V, limiting backflow current to ±0.75 μA over full temperature range. Input tolerance extends to 3.6 V regardless of VCC, supporting mixed-voltage domain interfacing without level shifters.

Key Specifications

Parameter Value and Actual Design Meaning
VCC Range 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without voltage translation.
ICC (max) 0.9 μA at −40 °C to +125 °C - ensures ultra-low standby power in battery-backed or energy-harvesting systems.
VIH / VIL VIH = 2.0 V (min) at VCC = 3.0 V; VIL = 0.9 V (max) - provides wide noise margin (>1.1 V) for reliable switching in noisy industrial environments.
tpd (max) 4.9 ns at VCC = 3.0–3.6 V, CL = 5 pF - supports >100 MHz toggle rates in high-speed control paths with minimal propagation delay variation.
IOFF Leakage ±0.75 μA at VCC = 0 V - prevents damaging back-current during hot-swap or partial system power-down sequences.
ESD Rating HBM >5000 V, CDM >1000 V - eliminates need for external ESD protection in handheld and portable equipment designs.
Operating Temp −40 °C to +125 °C - qualified for under-hood automotive modules, industrial PLC I/O, and extended-temperature embedded controllers.

Pinout & Package

XSON6 package (SOT886): plastic extremely thin small outline, no leads, 6 terminals, body size 1.0 × 1.45 × 0.5 mm. Pin 1 index located on lower-left corner below marking code 'aB'.

Pin/Terminal Circuit Role Design Meaning
A Data input Schmitt-triggered input accepting 0–3.6 V; enables clean logic transitions from slow or noisy sources.
B Data input Second Schmitt-triggered input; NAND function active only when both A and B are HIGH.
GND Ground reference 0 V return path for all internal circuitry and output sink current; must be low-impedance for noise immunity.
Y Open-drain output Active-LOW output requiring external pull-up; supports wired-AND, I²C, SMBus, and interrupt bus sharing.
n.c. No connection Internally unconnected terminal; left floating per design-no routing or soldering required.
VCC Supply voltage Power rail for core logic; IOFF activates automatically when VCC = 0 V to isolate Y from backfeed.

Key Features

Feature Design Value
Wide VCC range 0.8 V to 3.6 V operation allows direct integration into multi-rail systems without LDOs or regulators.
Schmitt-trigger inputs Input hysteresis ≥0.3×VCC rejects noise spikes and stabilizes outputs during slow edge transitions.
IOFF partial power-down Output disabled and leakage limited to ±0.75 μA when VCC = 0 V-enables safe hot-plug and power-gating.
Overvoltage-tolerant inputs Inputs withstand up to 3.6 V independent of VCC-supports interfacing with higher-voltage peripherals safely.
Low dynamic noise Overshoot/undershoot <10% of VCC minimizes crosstalk and EMI in dense PCB layouts with shared ground planes.

Applications

I²C Bus Level Translation Hot-Swappable Module Enable

Use Scenario: Translating 1.8 V microcontroller GPIO to 3.3 V sensor I²C bus while maintaining bidirectional SDA/SCL integrity.

IC Role / Device Role / Timing Role: Open-drain NAND acts as active-LOW enable gate controlling pull-up voltage on SDA line; Schmitt inputs reject bus noise during arbitration.

Use Value: Eliminates discrete MOSFET level shifter; IOFF prevents backfeed when 1.8 V domain powers down while 3.3 V bus remains active.

Use Scenario: Enabling power delivery to a PCIe add-in card only after host BIOS confirms mechanical insertion and thermal readiness.

IC Role / Device Role / Timing Role: NAND gate combines presence detect (A) and thermal OK (B) signals to drive enable line (Y) to DC-DC controller.

Use Value: Ultra-low ICC (<0.9 μA) avoids loading always-on monitoring rails; IOFF blocks reverse current if card is removed mid-operation.

Industrial Sensor Wake-Up Logic Redundant Power-Fail Detection

Use Scenario: Waking an ultra-low-power MCU from deep sleep when either vibration (A) or temperature threshold (B) is exceeded.

IC Role / Device Role / Timing Role: NAND output pulled HIGH via resistor drives MCU's external interrupt pin; Schmitt inputs debounce mechanical switch bounce.

Use Value: Sub-1 μA quiescent current extends battery life beyond 10 years; 125 °C rating supports deployment in motor enclosures.

Use Scenario: Detecting simultaneous failure of primary (A) and backup (B) 5 V supplies to trigger controlled shutdown in telecom power shelves.

IC Role / Device Role / Timing Role: NAND output goes LOW only when both supplies drop-driving fault latch and disabling downstream converters.

Use Value: Input overvoltage tolerance (3.6 V) permits direct connection to 5 V rails via resistive dividers; <10% noise margin ensures false-trip immunity.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NAND gate applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G00DPWR Push-pull output (not open-drain); no IOFF; VIH/VIL fixed at 70%/30% of VCC; max ICC = 10 μA at 125 °C. Cannot replace wired-AND or I²C bus functions; unsuitable for partial power-down scenarios. Select only when push-pull drive and higher speed (2.5 ns tpd) outweigh need for bus sharing or IOFF isolation.
74LVC1G132GW,125 Schmitt-trigger NAND with push-pull output; no IOFF; same VCC range; ICC = 1 μA (max) at 125 °C. Lacks open-drain output and IOFF-cannot support multi-master bus topologies or hot-swap isolation. Choose only for noise-immune gating where output must drive CMOS loads directly, not shared lines.

Compared with SN74LVC1G00DPWR and 74LVC1G132GW,125, the 74AUP1G38GF,132 uniquely combines open-drain output, IOFF, Schmitt inputs, and sub-1 μA ICC-making it the sole option for low-power, mixed-voltage, hot-pluggable bus control.

Availability

74AUP1G38GF,132 is available at Aetrix Electronics and suitable for I²C level translation, hot-swappable module enable, industrial sensor wake-up logic, and redundant power-fail detection requiring stable component supply across automotive, industrial, and IoT applications.

Supply support for 74AUP1G38GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in mass-market electronics.

The 74AUP1G38GF,132 belongs to Nexperia's Advanced Ultra Low Power (AUP) logic family-designed specifically for energy-constrained, multi-voltage, and thermally demanding embedded systems where static power, noise immunity, and power-domain isolation are critical.

FAQ

Can 74AUP1G38GF,132 drive an I²C bus directly?

Yes-it features a true open-drain output compatible with I²C specifications. Connect an external pull-up resistor (e.g., 2.2 kΩ to 3.3 V) to SDA/SCL. Its Schmitt-trigger inputs tolerate slow rise times, and IOFF prevents backfeed if the microcontroller powers down while the bus remains active.

What is the maximum capacitive load the output can drive?

The output is characterized up to 30 pF load capacitance, with tpd = 15.3 ns (max) at VCC = 3.0–3.6 V. For reliable operation beyond 30 pF, add a series resistor (e.g., 33 Ω) near the driver to damp ringing and maintain signal integrity on long traces.

Does the device require external pull-up on the Y pin?

Yes-Y is open-drain and cannot source current. An external pull-up resistor to a valid logic-high voltage (≤3.6 V) is mandatory for HIGH-level assertion. Pull-up value depends on bus speed and capacitance; typical I²C values range from 1 kΩ to 10 kΩ.

How does IOFF behave when VCC is ramping during power-up?

IOFF activates only when VCC reaches 0 V-not during ramp-up. During power sequencing, the device behaves normally once VCC exceeds ~0.5 V. IOFF ensures safety only during full power removal, preventing reverse current from Y into VCC when the supply is fully off.

74AUP1G38GF,132 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Obsolete
Logic Type:
NAND Gate
Number of Circuits:
1
Number of Inputs:
2
Features:
Open Drain
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
-, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
12.7ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON, SOT891 (1x1)

74AUP1G38GF,132 FAQ

1.How can I place an order for 74AUP1G38GF,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G38GF,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G38GF,132 reliable?

The price and inventory of 74AUP1G38GF,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G38GF,132 is usually 5 days.

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5.How can I obtain technical support or documentation for 74AUP1G38GF,132?

For technical support, including 74AUP1G38GF,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G38GF,132 requirements.

6.How does Aetrix verify that 74AUP1G38GF,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G38GF,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G38GF,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1G38GF,132?

All 74AUP1G38GF,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G38GF,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G38GF,132 part is unused and in its original packaging.

Return procedure for 74AUP1G38GF,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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