NXP Semiconductors 74AUP1G38GN,132

Overview

74AUP1G38GN,132 from Nexperia is a single 2-input NAND gate with open-drain output, Schmitt-trigger inputs, and IOFF partial power-down capability. It operates across 0.8 V to 3.6 V supply, delivers propagation delay as low as 0.9 ns (VCC = 3.3 V, CL = 5 pF), consumes ≤1.4 μA ICC (max) at −40 °C to +125 °C, and supports overvoltage-tolerant inputs up to 3.6 V. It is used in level-shifting I²C bus interfaces and low-power sensor wake-up logic.

For engineers reviewing the 74AUP1G38GN,132 datasheet, 74AUP1G38GN,132 pinout, 74AUP1G38GN,132 application, or 74AUP1G38GN,132 equivalent, key selection criteria include open-drain drive strength at 3.3 V/1.8 V, Schmitt-trigger hysteresis for noisy signal conditioning, IOFF leakage under partial power-down, and XSON6 package thermal performance in space-constrained IoT nodes.

Technical Context

This device implements a single 2-input NAND function with true open-drain output - no internal pull-up - requiring external termination. Its Schmitt-trigger inputs provide ≥100 mV hysteresis (typ.) across VCC = 0.8–3.6 V, enabling robust operation with slow-rising signals such as reset lines or mechanical switch debouncing.

The IOFF circuit actively disables output leakage when VCC = 0 V, limiting power-off current to ±0.75 μA (max) over −40 °C to +125 °C. Input voltage tolerance extends to 3.6 V independent of VCC, allowing mixed-voltage domain interfacing without level translators.

Key Specifications

Pinout & Package

XSON6 package (SOT1115): extremely thin small outline, no leads, 6 terminals, body size 0.9 mm × 1.0 mm × 0.35 mm, wettable flank compatible for automated optical inspection.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NAND gate applications.

Compared with SN74LVC1G00DPWR and 74LVC1G132GW,125, the 74AUP1G38GN,132 uniquely combines open-drain output, sub-μA ICC, and IOFF - making it the only choice for energy-sensitive, multi-voltage, and hot-pluggable designs.

Availability

74AUP1G38GN,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, I²C bus extension, low-power wake-up logic, and reset signal conditioning requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G38GN,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in industrial and consumer electronics.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-powered and thermally constrained applications where nanowatt static power, wide VCC operation, and robust signal integrity are mandatory design requirements.

FAQ

Can 74AUP1G38GN,132 drive a 10 kΩ pull-up to 5 V?

No. The output is rated for 3.6 V absolute maximum voltage; applying 5 V to Y risks permanent damage. Use only with pull-ups ≤3.6 V. For 5 V systems, add a discrete level-shifting transistor or select a 5 V-tolerant open-drain buffer.

Is the n.c. pin on SOT1115 electrically isolated?

Yes. Pin 5 is not connected internally and has no bond wire or die attachment. It may be grounded or left floating per PCB layout needs - no electrical impact on functionality or ratings.

What is the minimum recommended VCC for guaranteed Schmitt-trigger operation?

0.8 V is the absolute minimum VCC for full specification compliance, including Schmitt-trigger hysteresis. Below 0.8 V, VIH/VIL thresholds degrade and hysteresis narrows - operation is not characterized or guaranteed.

Does IOFF activate automatically when VCC drops below threshold?

Yes. IOFF engages when VCC falls below ~0.2 V; output transitions to high-impedance state without external control. This occurs passively during power ramp-down and remains active until VCC rises above 0.5 V.