Nexperia USA Inc. 74AUP1G38GS,132

Overview

74AUP1G38GS,132 from Nexperia is a single 2-input NAND gate with open-drain output, Schmitt-trigger inputs, and IOFF partial power-down capability. It operates across 0.8 V to 3.6 V supply, delivers ≤1.4 μA max ICC at −40 °C to +125 °C, supports 5 pF load propagation delay as low as 0.8 ns (VCC = 3.3 V), and features overvoltage-tolerant inputs up to 3.6 V - used in level-shifting I²C bus pull-ups and low-power sensor interface logic.

For engineers reviewing the 74AUP1G38GS,132 datasheet, 74AUP1G38GS,132 pinout, 74AUP1G38GS,132 application, or 74AUP1G38GS,132 equivalent, this device is selected for ultra-low static power, rail-to-rail input tolerance, and guaranteed operation in extended-temperature industrial systems where IOFF prevents backfeed during partial power-down sequences.

Technical Context

The 74AUP1G38GS,132 implements a single 2-input NAND function with open-drain output, requiring an external pull-up for HIGH-level assertion. Its Schmitt-trigger inputs provide hysteresis (typically 0.2 × VCC) to reject noise on slow-rising signals, enabling robust interfacing with mechanical switches or RC-debounced sensors.

IOFF circuitry actively disables the output stage when VCC = 0 V, limiting power-off leakage to ±0.75 μA and blocking reverse current flow - critical for hot-swap and multi-rail domain isolation. The device complies with JEDEC standards JESD8-12 through JESD8C across its full voltage range.

Key Specifications

Pinout & Package

XSON6 package (SOT1202): extremely thin small outline, no leads, 6 terminals, body size 1.0 mm × 1.0 mm × 0.35 mm, thermal pad optional, pin 1 marked by notch or dot at lower-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input NAND gate applications.

Compared with SN74LVC1G00DBVR and 74LVC1G132GW,125, the 74AUP1G38GS,132 uniquely combines open-drain output, IOFF, sub-μA ICC, and 0.8 V operation - making it irreplaceable in ultra-low-power, multi-rail, and hot-swap-sensitive designs.

Availability

74AUP1G38GS,132 is available at Aetrix Electronics and suitable for industrial automation controllers, battery-powered sensor nodes, and automotive body electronics requiring stable component supply across extended temperature and low-power constraints.

Supply support for 74AUP1G38GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, analog, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in industrial and consumer electronics.

The 74AUP (Advanced Ultra-low Power) family targets ultra-low-power logic applications demanding sub-microwatt static consumption, wide VCC scalability, and robust operation in harsh thermal environments.

FAQ

Can 74AUP1G38GS,132 drive an LED directly?

No. Its open-drain output can only sink current - not source it - and maximum sink current is 20 mA at VO = 0 V. Driving an LED requires an external pull-up resistor and proper current-limiting design. Also, forward voltage drop and LED color affect usable current; typical red LEDs at 2.0 V drop leave ~1.3 V across the resistor at 3.3 V VCC, limiting practical current to ~5–10 mA depending on resistor choice.

Does the n.c. pin on SOT1202 require PCB routing or grounding?

No. Pin 5 is internally unconnected and electrically inert. It may be left floating on the PCB, though grounding it improves mechanical stability and thermal dissipation marginally. Do not route signals or power to this terminal - doing so risks internal damage or unpredictable behavior due to lack of internal bonding.

How does IOFF behave when VCC is ramping during power-up?

IOFF activates only when VCC falls to 0 V - not during ramp-up. During power-on, the device transitions from high-impedance to functional logic once VCC exceeds the minimum operating threshold (~0.8 V). No special sequencing is needed; however, inputs should remain within 0 V to 3.6 V during ramp to avoid latch-up or excessive leakage.

Is the Schmitt-trigger hysteresis adjustable via external components?

No. Hysteresis is fixed and process-defined, typically 0.2 × VCC, with no external adjustment. It is inherent to the input stage design and varies proportionally with supply voltage. This ensures consistent noise immunity across the full 0.8–3.6 V range without requiring external resistors or calibration.