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Nexperia USA Inc. 74AUP1G38GW,125
- Part No.:
- 74AUP1G38GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G38GW,125.pdf
- Description:
- IC GATE NAND 1CH 2-INP 5TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:11,854
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Product details
Overview
74AUP1G38GW,125 from Nexperia is a single 2-input NAND gate with open-drain output, Schmitt-trigger inputs, and IOFF partial power-down capability. It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, supports −40 °C to +125 °C ambient, and features 5-pin TSSOP5 (SOT353-1) packaging. It is used in level-shifting I²C bus pull-up networks and low-power sensor interface logic.
For engineers reviewing the 74AUP1G38GW,125 datasheet, 74AUP1G38GW,125 pinout, 74AUP1G38GW,125 application, or 74AUP1G38GW,125 equivalent, key selection criteria include open-drain drive strength at 3.0 V, Schmitt-trigger hysteresis for noisy signal conditioning, IOFF leakage < ±0.75 μA during power sequencing, and TSSOP5 thermal derating above 74 °C.
Technical Context
This device implements a single 2-input NAND function with true open-drain output - no internal pull-up - requiring external termination. Its Schmitt-trigger inputs provide ≥0.3×VCC hysteresis across all voltage ranges, enabling robust operation with slow-rising signals from microcontrollers or analog sensors.
The IOFF circuit actively disables output terminals when VCC = 0 V, limiting backflow current to ±0.75 μA maximum and supporting hot-insertion and multi-rail partial power-down systems. Input overvoltage tolerance up to 3.6 V allows interfacing with higher-voltage domains without level shifters.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct integration with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without regulators. |
| Max ICC (Tamb = 125 °C) | 0.9 μA - ensures sub-microwatt static power in always-on battery-backed subsystems. |
| Propagation Delay (VCC = 3.0 V, CL = 5 pF) | 0.8 ns to 4.9 ns - supports >100 MHz toggle rates in timing-critical control paths. |
| VOL (IO = 4.0 mA, VCC = 3.0 V) | ≤0.50 V - guarantees strong LOW-state drive into standard 3.3 V CMOS loads. |
| Input Hysteresis (VIH − VIL) | ≥0.3×VCC - rejects noise spikes up to 1.08 V on 3.6 V rails, critical for industrial sensor inputs. |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents disruptive current flow during board-level power sequencing or sleep mode transitions. |
| ESD Robustness (HBM) | >5000 V - eliminates need for external ESD protection in handheld and portable designs. |
Pinout & Package
TSSOP5 (SOT353-1) package: plastic thin shrink small outline, 5-lead, 1.25 mm body width, 0.65 mm pitch, 1.3 mm height. Pin 1 index located below marking code in lower-left corner.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | A | First logic input; Schmitt-triggered, tolerant to slow edges and overvoltage up to 3.6 V. |
| 2 | B | Second logic input; identical electrical behavior to Pin 1, fully interchangeable. |
| 3 | GND | Ground reference for all internal circuitry and output discharge path. |
| 4 | Y | Open-drain output; sinks current only - requires external pull-up for HIGH state. |
| 5 | VCC | Power supply input; IOFF activation occurs when VCC = 0 V, disabling Y and isolating inputs. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (0.8 V–3.6 V) | Supports direct connection to ultra-low-voltage MCUs (e.g., ARM Cortex-M0+ at 0.9 V) and legacy 3.3 V peripherals. |
| Schmitt-trigger inputs | Enables reliable logic decisioning on slow-rising signals (e.g., thermistor-based comparators or RC-debounced switches). |
| IOFF partial power-down | Prevents back-current damage when this gate is powered off while connected to active 3.3 V buses or pull-ups. |
| Overvoltage-tolerant inputs | Accepts 0–3.6 V input signals regardless of VCC setting - simplifies mixed-voltage interconnect without translators. |
| Low dynamic power (CPD = 1.4 pF) | Reduces switching energy to <1.5 nJ per transition at 3.3 V/1 MHz - critical for duty-cycled IoT edge nodes. |
Applications
| Industrial Sensor Interface | I²C Bus Level Shifting |
|---|---|
|
Use Scenario: Interfacing a 1.8 V temperature sensor with a 3.3 V microcontroller ADC monitoring chain. IC Role / Device Role / Timing Role: Acts as a bidirectional level translator via open-drain wired-AND configuration, with Schmitt inputs rejecting EMI from motor drives. Use Value: Eliminates discrete MOSFET translators; IOFF prevents sensor-side current leakage when MCU enters deep sleep. |
Use Scenario: Extending an I²C bus between 3.3 V master and 1.2 V slave devices on separate PCB sections. IC Role / Device Role / Timing Role: Provides isolated open-drain buffering on SDA/SCL lines, preserving rise/fall time integrity across voltage domains. Use Value: Enables compliant 400 kHz I²C Fast-mode operation without timing skew or shoot-through risk. |
| Power Sequencing Control | Reset Signal Conditioning |
|
Use Scenario: Generating a synchronized system reset after three independent DC/DC converters reach regulation. IC Role / Device Role / Timing Role: NAND gate combines three enable signals (active-HIGH) to produce active-LOW reset; IOFF isolates during brown-out. Use Value: Guarantees glitch-free reset assertion even if one rail collapses mid-sequence - no race conditions. |
Use Scenario: Debouncing and noise filtering of a mechanical pushbutton feeding a microcontroller reset pin. IC Role / Device Role / Timing Role: Schmitt-trigger inputs convert noisy switch bounce into clean digital edges; open-drain output drives RC-filtered reset line. Use Value: Reduces firmware reset-handling complexity; eliminates false triggers from EFT bursts up to 4 kV. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input NAND gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G38DBVR | Higher ICC (max 10 μA), no Schmitt inputs, VCC min = 1.65 V, same TSSOP5 package. | Unsuitable for sub-1.65 V systems or noisy analog sensor interfaces; lacks IOFF. | Select only when operating strictly within 1.65–5.5 V and noise immunity is not required. |
| 74LVC1G00GV,125 | Push-pull output (not open-drain), no IOFF, same VCC range and Schmitt inputs, SOT457 (5-pin SC-74A) package. | Cannot perform wired-AND or I²C translation; unsuitable for multi-master bus topologies. | Choose only for simple gate logic where active-HIGH output drive is mandatory and bus sharing is absent. |
Compared with SN74LVC1G38DBVR and 74LVC1G00GV,125, the 74AUP1G38GW,125 uniquely combines ultra-low ICC, Schmitt inputs, IOFF, and open-drain output - making it the sole option for battery-powered, mixed-voltage, and hot-pluggable designs requiring guaranteed signal integrity and power sequencing safety.
Availability
74AUP1G38GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, I²C bus extension, power sequencing control, and reset signal conditioning requiring stable component supply across extended temperature and low-power constraints.
Supply support for 74AUP1G38GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and discrete components for automotive, industrial, and consumer markets.
The 74AUP (Advanced Ultra-low Power) product line targets ultra-low-power logic applications demanding sub-μA static current, wide VCC scalability, and robust operation in harsh environments - especially battery-powered and thermally constrained systems.
FAQ
Can 74AUP1G38GW,125 drive a 10 kΩ pull-up to 5 V?
No. The output is rated for 3.6 V absolute maximum voltage. Driving a 5 V pull-up risks exceeding VO limit and damaging the output transistor. Use only with pull-ups ≤3.6 V, or add a level-shifting buffer for 5 V domains.
Does the IOFF feature activate automatically when VCC drops below a threshold?
Yes. IOFF engages when VCC = 0 V, but not at intermediate voltages. The datasheet specifies IOFF leakage only at VCC = 0 V and VCC ≤ 0.2 V. Below nominal operation, behavior is undefined - design must ensure VCC reaches 0 V before asserting signals.
What is the minimum load capacitance for guaranteed timing performance?
The propagation delay specifications (e.g., 0.8–4.9 ns at 3.0 V) are validated at CL = 5 pF, including probe and jig capacitance. Operation below 5 pF is functional but uncharacterized; timing margins may improve slightly, but no guarantee is provided.
Is the Schmitt-trigger hysteresis adjustable or fixed?
Fixed. Hysteresis is process-defined and scales with VCC: VIH − VIL ≥ 0.3×VCC across all operating ranges. It cannot be modified externally or trimmed - it is an intrinsic property of the input stage design.
74AUP1G38GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- NAND Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- Open Drain
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Max):
- 500 nA
- Current - Output High, Low:
- -, 4mA
- Input Logic Level - Low:
- 0.7V ~ 0.9V
- Input Logic Level - High:
- 1.6V ~ 2V
- Max Propagation Delay @ V, Max CL:
- 12.7ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G38GW,125 FAQ
1.How can I place an order for 74AUP1G38GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G38GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G38GW,125 reliable?
The price and inventory of 74AUP1G38GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G38GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G38GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G38GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G38GW,125?
74AUP1G38GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G38GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G38GW,125?
For technical support, including 74AUP1G38GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G38GW,125 requirements.
6.How does Aetrix verify that 74AUP1G38GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G38GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G38GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G38GW,125?
All 74AUP1G38GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G38GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G38GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G38GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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