NXP Semiconductors 74AUP1G57GW/S711125
- Part No.:
- 74AUP1G57GW/S711125
- Manufacturer:
- NXP Semiconductors
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP1G57GW/S711125.pdf
- Description:
- 74AUP1G57GW - LOGIC CIRCUIT
- Quantity:
- Payment:

- Shipping:

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Product details
Overview
74AUP1G57GW/S711125 from NXP Semiconductors is a low-power configurable multiple-function logic gate implementing AND, OR, NAND, NOR, XNOR, inverter, or buffer via 3-bit input selection (A/B/C), with Schmitt-trigger inputs, IOFF partial power-down support, and operation across 0.8 V to 3.6 V supply. It delivers ultra-low ICC ≤ 0.9 µA (max) and propagation delay as low as 1.5 ns (VCC = 3.0 V, CL = 5 pF) for space-constrained portable and battery-powered logic interface applications.
For engineers reviewing the 74AUP1G57GW/S711125 datasheet, 74AUP1G57GW/S711125 pinout, 74AUP1G57GW/S711125 application, or 74AUP1G57GW/S711125 equivalent, key selection criteria include its 6-pin SC-88 (SOT363) package, hysteresis voltage (VH) up to 1.31 V at 3.0 V, IOFF leakage ≤ ±0.75 µA during power-down, and guaranteed operation from −40 °C to +125 °C.
Technical Context
This device uses a programmable logic array architecture where three inputs (A, B, C) select one of eight output states defined by a fixed function table. Its Schmitt-trigger inputs provide hysteresis (VT+ − VT−), enabling robust noise immunity for slow-rising/falling signals in noisy environments.
The IOFF circuit actively disables outputs when VCC = 0 V, preventing backflow current and supporting hot-swap and partial power-down system architectures. All inputs tolerate voltages up to 3.6 V independent of VCC, allowing level-shifting between mixed-voltage domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - enables direct interfacing with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic families without level shifters. |
| Max ICC | 0.9 µA at −40 °C to +125 °C - ensures sub-1 µA static power in always-on sensor nodes and real-time clock domains. |
| Propagation Delay | 1.5 ns min (VCC = 3.0 V, CL = 5 pF) - supports high-speed reconfiguration in FPGA I/O expansion and glue logic. |
| Hysteresis Voltage VH | Up to 1.31 V at VCC = 3.0 V - rejects >1.3 V peak-to-peak noise on push-button or mechanical switch inputs. |
| IOFF Leakage | ±0.75 µA at VCC = 0 V - guarantees safe isolation during power sequencing in multi-rail systems. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial PLC, and outdoor IoT edge nodes. |
| ESD Protection | HBM >5000 V, CDM >1000 V - eliminates need for external ESD protection in handheld and field-deployable equipment. |
Pinout & Package
74AUP1G57GW/S711125 is housed in a plastic surface-mounted SC-88 package (SOT363), measuring 2.2 mm × 1.8 mm × 1.1 mm, with 6 leads and a pin 1 indicator located on the lower left corner below the marking code "aC".
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| B | Data input | One of three configurable logic inputs; accepts 0–3.6 V regardless of VCC level. |
| GND | Ground reference | 0 V reference for all internal logic and output drivers; must be low-impedance for noise immunity. |
| A | Data input | Primary logic input; used with B and C to define function selection per Table 4. |
| Y | Data output | Single CMOS output capable of sourcing/sinking ±4 mA; driven only when VCC > 0 V and IOFF inactive. |
| VCC | Supply voltage | Power rail for internal logic and output stage; IOFF activates automatically when VCC = 0 V. |
| C | Data input | Third logic input; completes 3-bit pattern (C,B,A) that determines output state Y per function table. |
Key Features
| Feature | Design Value |
|---|---|
| Configurable logic function | Eight fixed output patterns selected by A/B/C inputs - replaces discrete AND/OR/NAND/NOR gates, reducing BOM count and PCB area. |
| Schmitt-trigger inputs | Input hysteresis (VH) ≥ 0.50 V at VCC = 0.8 V - cleans up slow-switching signals from sensors, encoders, or mechanical switches without external RC filtering. |
| IOFF partial power-down | Output disabled with VCC = 0 V while inputs/outputs tolerate 0–3.6 V - enables live insertion and safe power sequencing in modular systems. |
| Ultra-low static power | ICC ≤ 0.9 µA over full temperature range - extends battery life in coin-cell-powered wearables and remote sensors. |
| Wide VCC tolerance | Operates from 0.8 V to 3.6 V - supports single-supply designs across 1.2 V ASIC cores, 1.8 V FPGAs, and 3.3 V microcontrollers. |
Applications
| Industrial Sensor Interface | Automotive Body Control |
|---|---|
Use Scenario: Interfacing noisy mechanical limit switches and rotary encoders to a 3.3 V microcontroller in a factory automation PLC. IC Role / Device Role / Timing Role: Configurable gate acts as debounced input conditioner and logic translator, using Schmitt-trigger inputs to reject EMI and IOFF to isolate during controller sleep mode. Use Value: Eliminates external RC filters and pull-up resistors; reduces board space by 40% vs. discrete solution while meeting IEC 61000-4-2 Level 4 ESD requirements. | Use Scenario: Managing door lock actuator enable logic and mirror position feedback in a vehicle body control module operating at 125 °C ambient. IC Role / Device Role / Timing Role: Configurable gate implements OR logic for dual-lock request sources and inverter logic for reverse-polarity feedback signals. Use Value: Single 74AUP1G57GW/S711125 replaces two discrete gates; −40 °C to +125 °C rating ensures reliability in engine bay proximity. |
| Portable Medical Device | IoT Edge Node |
Use Scenario: Enabling low-power wake-up logic for a Bluetooth LE pulse oximeter powered by a CR2032 coin cell. IC Role / Device Role / Timing Role: Gate configured as buffer drives an interrupt line to the MCU; operates at 1.8 V to minimize active current draw. Use Value: ICC ≤ 0.5 µA at 25 °C extends battery runtime beyond 12 months; SC-88 footprint fits within tight 8 mm × 8 mm PCB constraint. | Use Scenario: Signal conditioning for PIR motion sensor output before feeding into a 3.0 V ESP32 host in a smart lighting node. IC Role / Device Role / Timing Role: Gate configured as NAND performs motion detection AND ambient light validation before triggering LED driver enable. Use Value: Built-in hysteresis prevents false triggers from sensor drift; 3.6 V-tolerant inputs accept raw PIR output without clamping diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar configurable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G57DBVR | Wider VCC range (1.65–5.5 V); no Schmitt-trigger inputs; higher ICC (10 µA typical); no IOFF. | Requires external hysteresis for noisy inputs; unsuitable for partial power-down systems. | Select when interfacing 5 V logic or when ultra-low standby current is not required. |
| 74AUP1G58GW | Same family, identical package and pinout; supports only AND/OR/NAND/NOR (no XNOR/inverter/buffer); same electrical specs. | Limited to four logic functions; cannot replace 74AUP1G57GW/S711125 in XNOR or buffer configurations. | Select only if design uses exclusively AND/OR/NAND/NOR and requires lowest possible cost within AUP family. |
Compared with SN74LVC1G57DBVR and 74AUP1G58GW, the 74AUP1G57GW/S711125 uniquely combines Schmitt-trigger noise immunity, IOFF-enabled power sequencing, and full eight-function configurability in a 1.1 mm height SC-88 package - making it the sole choice for battery-critical, noise-prone, or hot-pluggable embedded systems.
Availability
74AUP1G57GW/S711125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, portable medical devices, and IoT edge nodes requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G57GW/S711125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
NXP Semiconductors is a global semiconductor company headquartered in Eindhoven, Netherlands, specializing in secure connectivity solutions for automotive, industrial, and IoT markets.
The 74AUP1G57GW/S711125 belongs to the AUP (Advanced Ultra-low Power) logic family, designed specifically for energy-constrained, noise-sensitive, and thermally demanding embedded applications where traditional logic families fail to meet static power or signal integrity requirements.
FAQ
What logic functions does the 74AUP1G57GW/S711125 support?
The 74AUP1G57GW/S711125 supports eight logic functions determined by the 3-bit input combination (C,B,A): AND, OR, NAND, NOR, XNOR, inverter, buffer, and AND with both inputs inverted. Each function maps directly to a row in the device's function table (Table 4), and no external configuration pins or programming are required - behavior is hardwired by input voltage levels.
Does the 74AUP1G57GW/S711125 have Schmitt-trigger inputs, and why does it matter?
Yes, the 74AUP1G57GW/S711125 features Schmitt-trigger inputs with hysteresis voltage (VH) ranging from 0.07 V to 1.31 V depending on VCC. This means the input threshold differs for rising (VT+) and falling (VT−) edges, rejecting noise and contact bounce on slow-switching signals - critical for reliable operation with mechanical switches, encoders, or analog sensor outputs without external filtering components.
What is the purpose of the IOFF feature in the 74AUP1G57GW/S711125?
The IOFF (input/output off) feature in the 74AUP1G57GW/S711125 disables the output driver when VCC = 0 V, blocking backflow current from live inputs or outputs into the unpowered device. This protects downstream circuitry during power sequencing, hot-swap events, or partial system shutdown - a requirement in automotive domain controllers and modular industrial equipment where rails power up/down asynchronously.
What is the maximum operating temperature for the 74AUP1G57GW/S711125?
The 74AUP1G57GW/S711125 is fully specified from −40 °C to +125 °C, matching the extended temperature grade required for under-hood automotive electronics, industrial motor drives, and outdoor telecom infrastructure. Its electrical parameters - including propagation delay, VOH/VOL, and ICC - are guaranteed across this full range per the datasheet's static and dynamic characteristics tables.
Is the 74AUP1G57GW/S711125 pin-compatible with other packages in the same family?
No - the 74AUP1G57GW/S711125 uses the SC-88 (SOT363) package with a specific 6-pin layout (pin 1 = B, pin 2 = GND, pin 3 = A, pin 4 = Y, pin 5 = VCC, pin 6 = C). Other variants like 74AUP1G57GM (SOT886) and 74AUP1G57GN (SOT1115) use XSON6 footprints with different pinouts and thermal profiles; they are not mechanically or electrically interchangeable without PCB redesign.
74AUP1G57GW/S711125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- NXP Semiconductors
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Bulk
- Product Status:
- Active
- Logic Type:
- Configurable Multiple Function
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Schmitt Trigger Input:
- No
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- SOT-363
74AUP1G57GW/S711125 FAQ
1.How can I place an order for 74AUP1G57GW/S711125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G57GW/S711125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G57GW/S711125 reliable?
The price and inventory of 74AUP1G57GW/S711125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G57GW/S711125 is usually 5 days.
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74AUP1G57GW/S711125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G57GW/S711125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G57GW/S711125?
For technical support, including 74AUP1G57GW/S711125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G57GW/S711125 requirements.
6.How does Aetrix verify that 74AUP1G57GW/S711125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G57GW/S711125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G57GW/S711125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G57GW/S711125?
All 74AUP1G57GW/S711125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G57GW/S711125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G57GW/S711125 part is unused and in its original packaging.
Return procedure for 74AUP1G57GW/S711125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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