Diodes Incorporated 74AUP1G58DW-7

Overview

74AUP1G58DW-7 from Diodes Incorporated is a single 3-input configurable multiple-function logic gate in SOT363 package, supporting AND, OR, NAND, NOR, XOR, inverter, and buffer functions via input pin configuration. It operates from 0.8V to 3.6V, delivers ±4mA output drive at 3.0V, features Schmitt-trigger inputs (950mV typical hysteresis at V_CC = 3.0V), and supports partial power-down via IOFF. It is used in battery-powered portable electronics for voltage-level shifting and signal conditioning.

For engineers reviewing the 74AUP1G58DW-7 datasheet, 74AUP1G58DW-7 pinout, 74AUP1G58DW-7 application, or 74AUP1G58DW-7 equivalent, key selection criteria include ultra-low static current (<0.9µA), 3.6V-tolerant inputs enabling mixed-voltage interfacing, IOFF-enabled power-down isolation, and sub-3ns propagation delay at 3.3V with 5pF load.

Technical Context

The 74AUP1G58DW-7 implements a programmable 3-input combinational logic cell where the output Y is determined by all eight possible combinations of inputs A, B, and C - enabling user-defined Boolean functions without external components. Its Schmitt-trigger inputs provide noise immunity with voltage-dependent hysteresis (0.07–1.31V across supply range), critical for slow-rising signals in low-power systems.

IOFF circuitry actively disables the output during power-down, blocking back-current flow when V_CC = 0V while inputs remain biased at 0–3.6V. This enables safe hot-insertion and partial system shutdown in multi-rail embedded designs, meeting JESD78 Class I latch-up immunity (>100mA) and robust ESD protection (2kV HBM, 1kV CDM).

Key Specifications

Pinout & Package

SOT363 (2.0mm × 2.0mm × 1.1mm, 0.65mm pitch) - thermally optimized for space-constrained portable PCBs with 371°C/W θ_JA.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G58DBVR and 74AUP1G57GW,125, the 74AUP1G58DW-7 uniquely combines ultra-low-voltage operation (0.8V), Schmitt-trigger noise immunity, and full 3-input configurability - making it the only option for battery-powered systems requiring both wide supply range and robust input signal conditioning.

Availability

74AUP1G58DW-7 is available at Aetrix Electronics and suitable for battery-powered wearables, USB-C peripheral interfaces, smart home sensors, and industrial digital input modules requiring stable component supply across extended temperature ranges.

Supply support for 74AUP1G58DW-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and logic solutions for power management, signal integrity, and connectivity applications.

The 74AUP logic family targets ultra-low-power portable and battery-operated systems, emphasizing sub-1V operation, nanowatt static consumption, and mixed-voltage interoperability without external level shifters.

FAQ

What logic functions can be implemented using the 74AUP1G58DW-7?

The 74AUP1G58DW-7 supports seven distinct logic functions - AND, OR, NAND, NOR, XOR, inverter, and non-inverting buffer - selected by hardwiring inputs A, B, and C to V_CC or GND per the Function Selection Table in DS36853. Each configuration maps directly to a specific truth table; no external programming or configuration pins are required.

How does the IOFF feature protect the device during partial power-down?

When V_CC = 0V, the IOFF circuit disables both output pull-up and pull-down transistors, presenting a high-impedance state at Y with leakage <±0.6µA across –40°C to +125°C. This prevents current backflow from live inputs (0–3.6V) into the unpowered V_CC rail, protecting downstream circuitry and maintaining signal integrity in multi-rail systems.

Can the 74AUP1G58DW-7 interface between 1.8V and 3.3V logic domains?

Yes - its inputs tolerate up to 3.6V regardless of V_CC, allowing 3.3V signals to drive the device while powered from 1.8V. The output swings rail-to-rail (0V to 1.8V), so a level-shifting receiver is needed on the 3.3V side. For bidirectional translation, pairing with a second 74AUP1G58DW-7 configured as inverter provides clean, low-power domain bridging.

What is the maximum capacitive load the 74AUP1G58DW-7 can drive reliably?

The device is characterized up to 30pF load capacitance. At 3.3V supply and 25°C, t_PD remains ≤7.5ns with 30pF (CL=30pF, TA=+25°C). Driving >30pF risks exceeding recommended output current limits (±4mA) and may cause excessive rise/fall times or logic errors; for heavier loads, add a dedicated buffer stage.