Nexperia USA Inc. 74AUP1G58GF,132

Overview

74AUP1G58GF,132 from Nexperia is a single-channel, low-power configurable multiple-function logic gate with Schmitt-trigger inputs, supporting AND, OR, NAND, NOR, XOR, inverter, and buffer configurations via its 3-bit input control (A/B/C). It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, and features IOFF partial power-down protection. It is used in battery-powered sensor interfaces and portable I/O expansion where voltage flexibility and ultra-low static power are critical.

For engineers reviewing the 74AUP1G58GF,132 datasheet, 74AUP1G58GF,132 pinout, 74AUP1G58GF,132 application, or 74AUP1G58GF,132 equivalent, key selection criteria include its 6-pin XSON6 (SOT886) package, Schmitt-trigger noise immunity, sub-1 μA supply current over full temperature range, and configurable logic function without external components.

Technical Context

The device implements a programmable logic cell using three data inputs (A, B, C) to select one of seven standard Boolean functions through internal hardwired decoding-no configuration register or clock required. Its Schmitt-trigger inputs provide hysteresis (VH = 0.07–1.31 V depending on VCC), enabling robust operation in noisy environments with slow-rising signals.

All inputs tolerate up to 3.6 V regardless of VCC level, and the IOFF circuit actively disables the output when VCC = 0 V, limiting backflow current to ±0.75 μA max. Propagation delay ranges from 1.6 ns (VCC = 3.3 V, CL = 5 pF) to 24.1 ns (VCC = 1.2 V, CL = 30 pF), scaling predictably with load and supply voltage.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 × 1.45 × 0.5 mm; thermal pad optional; pin 1 marked by index area in lower-left corner.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G58DBVR and 74LVC1G97GW,125, the 74AUP1G58GF,132 uniquely combines sub-1 μA ICC, Schmitt-trigger noise rejection, IOFF protection, and 0.8 V operation - making it the sole option for ultra-low-power, mixed-voltage, and EMI-prone embedded sensing nodes.

Availability

74AUP1G58GF,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable I/O expanders, automotive body control modules, and low-power remote keypads requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AUP1G58GF,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions optimized for reliability and energy efficiency.

The 74AUP (Advanced Ultra-low Power) product line targets battery-constrained and thermally sensitive applications, emphasizing minimal static/dynamic power, wide VCC scalability, and robust signal integrity - exemplified by the 74AUP1G58GF,132's 0.8–3.6 V operation and Schmitt-trigger resilience.

FAQ

What logic functions can the 74AUP1G58GF,132 implement?

The device implements seven fixed Boolean functions - AND, OR, NAND, NOR, XOR, inverter, and buffer - selected solely by hardwiring its three inputs (A, B, C) to HIGH or LOW. No programming interface or clock is needed; configuration is static and determined at design time via PCB routing.

Does the 74AUP1G58GF,132 require external pull-up or pull-down resistors?

No. All inputs accept direct connection to VCC or GND without external biasing. The internal structure allows unambiguous logic-level definition across the full 0.8–3.6 V supply range, eliminating resistor networks and saving board space in compact designs.

How does the IOFF feature protect the device during partial power-down?

When VCC drops to 0 V, the IOFF circuit forces the Y output into high-impedance state, limiting backflow current to ±0.75 μA maximum. This prevents unintended current paths through the output when other system rails remain active - critical for hot-pluggable modules and multi-domain power sequencing.

Can the 74AUP1G58GF,132 interface with 5 V logic systems?

Its inputs tolerate up to 3.6 V regardless of VCC level, so direct connection to 5 V outputs is unsafe and may damage the device. For 5 V system interfacing, use a compatible level translator such as the NXSL1T45 or add external clamping diodes to limit input voltage to ≤3.6 V.