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Nexperia USA Inc. 74AUP1G79GW,125
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- Part No.:
- 74AUP1G79GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 5-TSSOP, SC-70-5, SOT-353
- Datasheet:
-
74AUP1G79GW,125.pdf
- Description:
- IC FF D-TYPE SNGL 1BIT 5TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:4,912
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Product details
Overview
74AUP1G79GW,125 from Nexperia is a single-channel, positive-edge-triggered D-type flip-flop in TSSOP5 (SOT353-1) package, operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed propagation delay ≤4.4 ns at 3.0–3.6 V with 5 pF load-used in clock-synchronized data latching in ultra-low-power sensor interfaces and portable MCU peripherals.
For engineers reviewing the 74AUP1G79GW,125 datasheet, 74AUP1G79GW,125 pinout, 74AUP1G79GW,125 application, or 74AUP1G79GW,125 equivalent, this device is selected for sub-1 μA static current, rail-to-rail input tolerance up to 3.6 V, and operation across –40 °C to +125 °C industrial temperature range in space-constrained logic control paths.
Technical Context
This flip-flop implements synchronous edge-triggered storage using CMOS logic with Schmitt-trigger input buffers on both D and CP pins, enabling robust operation with slow-rising signals. Its IOFF circuit actively disables outputs when VCC = 0 V, preventing backflow current during partial power-down sequences in multi-rail systems.
It supports dynamic operation up to 510 MHz at 3.0–3.6 V (CL = 5 pF), with setup time as low as 0.6 ns and hold time of 0 ns at VCC ≥ 2.3 V-enabling reliable sampling in high-speed digital control loops where timing margin is constrained.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply voltage | 0.8 V to 3.6 V - enables direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max static ICC | 1.4 μA at –40 °C to +125 °C - ensures negligible battery drain in always-on IoT endpoint nodes. |
| Propagation delay (tpd) | ≤4.4 ns at VCC = 3.0–3.6 V, CL = 5 pF - supports >200 MHz system clock synchronization in compact timing-critical paths. |
| IOFF leakage | ±0.75 μA at VCC = 0 V - prevents cross-rail contention and protects downstream circuitry during power sequencing. |
| Input hysteresis | Schmitt-trigger action - rejects <10 % VCC noise on D and CP inputs, eliminating need for external RC filtering in noisy environments. |
| Operating temperature | –40 °C to +125 °C - qualified for under-hood automotive modules and industrial motor control PCBs. |
| ESD rating | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without latch-up or parametric shift. |
Pinout & Package
TSSOP5 (SOT353-1) package: plastic thin shrink small outline, 5-lead, 1.25 mm body width, 0.65 mm pitch, lead-free and RoHS compliant.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | D | Data input - sampled on LOW-to-HIGH clock transition; accepts overvoltage up to 3.6 V regardless of VCC. |
| 2 | CP | Clock pulse input - Schmitt-triggered; defines edge-sensitive capture point; minimum pulse width 0.6 ns at 3.3 V. |
| 3 | GND | Ground reference - must be connected before VCC during power-up to ensure defined reset state. |
| 4 | Q | True output - complements D after CP edge; drives 4 mA sink/source at 3.0 V with VOL ≤0.45 V / VOH ≥2.30 V. |
| 5 | VCC | Supply voltage - powers internal logic and output stage; IOFF activates automatically when VCC = 0 V. |
Key Features
| Feature | Design Value |
|---|---|
| Rail-to-rail input tolerance | Inputs tolerate up to 3.6 V independent of VCC - simplifies mixed-voltage interconnect with legacy 3.3 V peripherals. |
| Ultra-low dynamic power | CPD = 2.7 pF at 3.3 V - limits switching power to <1 μW at 1 MHz, critical for energy-harvesting designs. |
| Partial power-down support | IOFF disables outputs at VCC = 0 V - eliminates backfeed risk in hot-swap or modular power architectures. |
| Wide temperature qualification | Specified from –40 °C to +125 °C - meets AEC-Q100 Grade 1 requirements for automotive body electronics. |
| No external pull resistors needed | Schmitt-trigger inputs provide inherent hysteresis - removes BOM cost and board area for discrete noise filtering. |
Applications
| Industrial Sensor Interface | Portable MCU Peripheral Sync |
|---|---|
|
Use Scenario: Latching analog-to-digital conversion results in battery-powered environmental sensors with intermittent wake-up cycles. IC Role / Device Role / Timing Role: Positive-edge D flip-flop capturing ADC DRDY pulses synchronized to host MCU clock domain. Use Value: Sub-μA ICC enables >10-year battery life; IOFF prevents current leakage when MCU is asleep and ADC remains powered. |
Use Scenario: Synchronizing GPIO status changes between low-power microcontroller and higher-speed peripheral bus. IC Role / Device Role / Timing Role: Edge-triggered register aligning asynchronous button press or interrupt signals to system clock domain. Use Value: 0.6 ns setup time allows clean sampling at 200+ MHz clock rates; Schmitt inputs reject EMI-induced glitches on long traces. |
| Automotive Body Control Module | IoT Edge Node Data Buffering |
|
Use Scenario: Debouncing and synchronizing door lock actuator feedback signals in harsh electrical environments. IC Role / Device Role / Timing Role: Single-bit storage element capturing switch closure events while rejecting alternator ripple and load dump transients. Use Value: –40 °C to +125 °C rating ensures reliability under hood; 5000 V HBM withstands ESD events during service access. |
Use Scenario: Temporarily holding sensor data before transmission in LPWAN edge devices with burst-mode RF operation. IC Role / Device Role / Timing Role: Data latch isolating sensor readout from RF transmit phase to prevent signal corruption. Use Value: 0.8 V minimum VCC allows direct connection to energy harvesting PMIC outputs; 1.25 mm wide TSSOP5 fits dense PCB layouts. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G79DBVR | Higher ICC (max 10 μA), no IOFF, VCC min = 1.65 V | Not suitable for 0.8–1.6 V systems or partial power-down use cases | Select only if operating exclusively above 1.65 V and IOFF is not required. |
| 74LVC1G79GW,125 | Higher propagation delay (≤7.1 ns), no Schmitt inputs, VCC min = 1.65 V | Lacks noise immunity on slow edges; incompatible with sub-1.65 V rails | Use only in noise-controlled, 1.8 V+ environments where cost is prioritized over timing margin. |
Compared with SN74LVC1G79DBVR and 74LVC1G79GW,125, the 74AUP1G79GW,125 delivers superior low-voltage operation, lower static power, and built-in IOFF-making it the sole choice for battery-critical, mixed-rail, or automotive-grade D-latch functions.
Availability
74AUP1G79GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable MCU peripheral synchronization, and automotive body control modules requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1G79GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.
The 74AUP (Advanced Ultra-low Power) logic family targets battery-powered, space-constrained, and thermally sensitive systems-designed specifically for ultra-low ICC, wide VCC range, and robust operation in automotive and industrial settings.
FAQ
Does 74AUP1G79GW,125 support true 0.8 V operation with full timing guarantees?
Yes. The datasheet specifies tpd ≤14.2 ns, fmax ≥170 MHz, VIH/VIL thresholds, and ICC ≤1.4 μA across –40 °C to +125 °C at VCC = 0.8 V. All AC/DC parameters are fully characterized down to 0.8 V, unlike standard LVC variants which require ≥1.65 V.
Can the 74AUP1G79GW,125 be used without external pull-up or pull-down resistors on D or CP inputs?
Yes. Schmitt-trigger inputs provide 0.3×VCC typical hysteresis, eliminating need for external biasing. Input leakage is ±0.75 μA max, and VIH/VIL thresholds scale with VCC-ensuring noise-immune operation even with floating or high-impedance sources.
What is the maximum capacitive load the Q output can drive while maintaining timing specs?
The device is characterized up to CL = 30 pF. At VCC = 3.3 V, tpd increases to ≤7.9 ns and fmax drops to ≥190 MHz. For guaranteed 4.4 ns tpd and 510 MHz fmax, CL must be ≤5 pF. Layout parasitics should be included in total CL budget.
How does IOFF behave during power sequencing when VCC ramps from 0 V to nominal?
IOFF activates when VCC falls below ~0.2 V and remains active until VCC exceeds ~0.4 V. During ramp-up, outputs stay in high-impedance until VCC crosses the functional threshold (~0.8 V), preventing glitch generation or bus contention in staged power systems.
74AUP1G79GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 5-TSSOP, SC-70-5, SOT-353
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Non-Inverted
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 5.8ns @ 3.3V, 50pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 0.8 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-TSSOP
74AUP1G79GW,125 FAQ
1.How can I place an order for 74AUP1G79GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G79GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G79GW,125 reliable?
The price and inventory of 74AUP1G79GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G79GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G79GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G79GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G79GW,125?
74AUP1G79GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G79GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G79GW,125?
For technical support, including 74AUP1G79GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G79GW,125 requirements.
6.How does Aetrix verify that 74AUP1G79GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G79GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G79GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G79GW,125?
All 74AUP1G79GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G79GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G79GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G79GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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