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NXP Semiconductors 74AUP1G79GX,125

Part No.:
74AUP1G79GX,125
Manufacturer:
NXP Semiconductors
Category:
Flip Flops
Package:
4-XFDFN Exposed Pad
Datasheet:
Aetrix74AUP1G79GX,125.pdf
Description:
IC FF D-TYPE SNGL 1BIT 5X2SON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:117,839

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Product details

Overview

74AUP1G79GX,125 from Nexperia is a single positive-edge-triggered D-type flip-flop in X2SON5 (SOT1226-3) package, operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. Used in low-power clock domain synchronization and data sampling in battery-powered IoT sensor nodes.

For engineers reviewing the 74AUP1G79GX,125 datasheet, 74AUP1G79GX,125 pinout, 74AUP1G79GX,125 application, or 74AUP1G79GX,125 equivalent, key selection criteria include its ultra-low ICC (≤1.4 μA max), 5-terminal thermal-enhanced X2SON5 footprint, sub-1 ns setup/hold times at 3.3 V, and IOFF-enabled system-level power sequencing in mixed-voltage designs.

Technical Context

This device implements a synchronous edge-triggered storage element with transparent input-to-output propagation only on LOW-to-HIGH clock transitions. Its Schmitt-trigger inputs accept slow-rising signals (Δt/ΔV ≤ 200 ns/V), enabling robust interfacing with mechanical switches or RC-debounced signals without external conditioning.

The IOFF circuit actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA - critical for hot-swap and multi-rail power management. All I/O pins tolerate up to 3.6 V regardless of VCC, supporting level-shifting between 1.2 V, 1.8 V, and 3.3 V domains without external translators.

Key Specifications

Parameter Value and Actual Design Meaning
Supply voltage range 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, and 3.3 V logic families without level shifters.
Max ICC (VCC = 0.8–3.6 V) 1.4 μA - ensures <1 μW static power at 1.8 V, suitable for always-on wake-up circuits.
tpd (CL = 5 pF, VCC = 3.3 V) 0.9–4.4 ns - supports >300 MHz operation in high-speed control loops with minimal latency.
tsu / th (VCC = 3.3 V) 1.0 ns / 0 ns - allows tight timing closure in FPGA-to-ASIC glue logic with no hold-time margin required.
IOFF leakage (VCC = 0 V) ±0.75 μA - prevents destructive back-current during partial power-down in modular systems.
Input overvoltage tolerance 3.6 V - permits safe connection to higher-voltage buses (e.g., 3.3 V I²C) while powered from 1.2 V.
Operating temperature –40 °C to +125 °C - qualified for under-hood automotive and industrial motor control environments.

Pinout & Package

X2SON5 package (SOT1226-3): 0.8 mm × 0.8 mm × 0.32 mm body, 5-terminal no-lead thermal-enhanced outline with exposed die pad for improved heat dissipation in space-constrained PCBs.

Pin/Terminal Circuit Role Design Meaning
1 D Data input - sampled on rising CP edge; Schmitt-triggered for noise rejection on slow edges.
2 CP Clock pulse input - positive-edge sensitive; accepts input rise/fall rates down to 200 ns/V.
3 GND Ground reference - shared return path for all internal logic and output drivers.
4 Q True data output - complements D state after CP edge; drives loads up to ±4 mA at 3.3 V.
5 VCC Supply voltage - powers internal logic and output stage; IOFF activates when VCC = 0 V.

Key Features

Feature Design Value
Ultra-low static power ICC ≤ 1.4 μA across full VCC (0.8–3.6 V) and temperature (–40 to +125 °C) range.
IOFF partial power-down Outputs disabled with <±0.75 μA leakage when VCC = 0 V - enables safe hot-plug and rail sequencing.
Schmitt-trigger inputs Hysteresis ≥ 0.3 × VCC ensures reliable switching with noisy or slow-rising signals (e.g., microcontroller GPIO).
Overvoltage-tolerant I/O All pins withstand 3.6 V regardless of VCC - eliminates need for external level translators in mixed-supply systems.
JEDEC-compliant ESD HBM >5000 V and CDM >1000 V - meets automotive and industrial handling requirements without extra protection.

Applications

Industrial Sensor Interface Automotive Body Control Module

Use Scenario: Sampling analog sensor outputs digitized by low-power SAR ADCs in wireless condition-monitoring nodes.

IC Role / Device Role / Timing Role: Synchronizes asynchronous ADC DRDY pulses to system clock domain while suppressing switch bounce and EMI-induced glitches.

Use Value: Eliminates metastability risk with 0 ns hold time and 1 ns setup at 3.3 V, reducing FPGA logic resource usage by offloading clock-domain crossing.

Use Scenario: Debouncing door latch and seat position switch signals before feeding to CAN controller MCU.

IC Role / Device Role / Timing Role: Provides hardware-level synchronization and noise filtering for mechanical switch inputs in harsh automotive environments.

Use Value: Schmitt-trigger inputs tolerate >100 mV ripple on 12 V–regulated 5 V rails, avoiding false triggers without software polling or RC networks.

Wearable Health Monitor Smart Home Hub Controller

Use Scenario: Capturing motion interrupt signals from MEMS accelerometers in battery-powered fitness trackers.

IC Role / Device Role / Timing Role: Edge-triggered storage of wake-up events with ultra-low standby current (<1.4 μA) to extend battery life.

Use Value: IOFF functionality isolates Q output during system sleep mode, preventing back-current drain from 3.3 V sensor rail into 1.2 V core domain.

Use Scenario: Glue logic between 1.8 V Wi-Fi SoC and 3.3 V Zigbee transceiver in multi-protocol home automation gateways.

IC Role / Device Role / Timing Role: Level-shifting and synchronizing control signals across independent power domains with no external components.

Use Value: 3.6 V-tolerant I/O allows direct connection to 3.3 V transceiver pins while powered from 1.8 V SoC rail - saving board space and BOM cost.

Equivalent & Alternatives

The following parts are listed as comparable options for similar D-type flip-flop applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G79DBVR Higher ICC (max 10 μA), no IOFF, wider VCC (1.65–5.5 V), larger SOT-23-5 package. Lacks power-down isolation; unsuitable for partial-rail shutdown systems. Select when interfacing with 5 V peripherals and IOFF is not required.
74LVC1G79GW,125 Same AUP family but TSSOP5 (SOT353-1) package; identical electrical specs except 0.2 mm taller profile and 1.25 mm body width. Requires more PCB area; less thermally efficient than X2SON5 in dense layouts. Select when legacy TSSOP reflow compatibility or hand-soldering access is prioritized over miniaturization.

Compared with SN74LVC1G79DBVR and 74LVC1G79GW,125, the 74AUP1G79GX,125 delivers lowest static power and smallest footprint - critical for wearables and automotive modules where thermal density and battery runtime constrain design margins.

Availability

74AUP1G79GX,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, wearable health monitors, and smart home hub controllers requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G79GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable, and energy-efficient logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.

The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power, high-noise-immunity digital signal conditioning in space- and energy-constrained applications - especially where mixed-voltage operation and partial power-down are mandatory.

FAQ

Does 74AUP1G79GX,125 support operation at 0.8 V with full timing guarantees?

Yes. The device is fully characterized from 0.8 V to 3.6 V, including propagation delay (tpd ≤14.2 ns at 0.8 V, CL = 5 pF), setup/hold times, and IOFF functionality. Static current remains ≤1.4 μA across this range, making it viable for energy-harvesting systems powered by thin-film batteries or RF harvesters.

Can the Q output drive a 50 pF load reliably at 3.3 V?

No. The datasheet specifies timing and drive strength up to CL = 30 pF. At 30 pF and 3.3 V, tpd is ≤7.9 ns and VOH/VOL meet spec with ±4 mA drive. Driving 50 pF exceeds characterization limits and may increase propagation delay unpredictably or violate setup/hold margins downstream.

Is the X2SON5 (SOT1226-3) package compatible with standard reflow profiles?

Yes. SOT1226-3 is qualified for IPC/JEDEC J-STD-020 moisture sensitivity level 1 (MSL-1) and supports standard lead-free reflow profiles (peak 260 °C). Its thermal-enhanced construction improves solder joint reliability in thermally cycled applications like automotive ECUs.

What happens to the Q output during VCC ramp-up or brownout?

During VCC ramp-up, Q remains in a high-impedance state until VCC exceeds ~0.5 V, then follows D on first valid CP edge. During brownout below 0.5 V, IOFF activates and forces Q into high-Z with <±0.75 μA leakage - preventing unintended logic states or bus contention on shared signal lines.

74AUP1G79GX,125 Specifications

Product attributes
Attribute value
Manufacturer:
NXP Semiconductors
Series:
74AUP
Package/Case:
4-XFDFN Exposed Pad
Packaging:
Bulk
Product Status:
Active
Function:
Standard
Type:
D-Type
Output Type:
Non-Inverted
Number of Elements:
1
Number of Bits per Element:
1
Clock Frequency:
309 MHz
Max Propagation Delay @ V, Max CL:
5.8ns @ 3.3V, 30pF
Trigger Type:
Positive Edge
Current - Output High, Low:
4mA, 4mA
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Iq):
500 nA
Input Capacitance:
0.8 pF
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
5-X2SON (0.80x0.80)

74AUP1G79GX,125 FAQ

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The price and inventory of 74AUP1G79GX,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G79GX,125 is usually 5 days.

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For technical support, including 74AUP1G79GX,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G79GX,125 requirements.

6.How does Aetrix verify that 74AUP1G79GX,125 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G79GX,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G79GX,125 meets industry standards.

7.What is the process for return or replacement of 74AUP1G79GX,125?

All 74AUP1G79GX,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G79GX,125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G79GX,125 part is unused and in its original packaging.

Return procedure for 74AUP1G79GX,125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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