Nexperia USA Inc. 74AUP1G80GM,115
- Part No.:
- 74AUP1G80GM,115
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Flip Flops
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G80GM,115.pdf
- Description:
- IC FF D-TYPE SNGL 1BIT 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:18,852
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Product details
Overview
74AUP1G80GM,115 from Nexperia is a single positive-edge-triggered D-type flip-flop in XSON6 (SOT886) package, operating from 0.8 V to 3.6 V supply. It stores data on LOW-to-HIGH clock transitions with 0.9 μA max ICC, Schmitt-trigger inputs for noise immunity, and IOFF circuitry enabling partial power-down mode. Used in low-power clock domain synchronization and signal edge alignment in battery-powered IoT sensor nodes.
For engineers reviewing the 74AUP1G80GM,115 datasheet, 74AUP1G80GM,115 pinout, 74AUP1G80GM,115 application, or 74AUP1G80GM,115 equivalent, key selection criteria include guaranteed operation down to 0.8 V, sub-1 μA static current, -40 °C to +125 °C temperature range, and IOFF-enabled system-level power sequencing in multi-rail embedded designs.
Technical Context
This device implements a synchronous edge-triggered storage element with non-inverting Q output, requiring valid D-input setup (e.g., 0.2 ns at 3.6 V) and hold (e.g., 0 ns at 3.6 V) relative to CP rising edge. All inputs feature Schmitt-trigger thresholds for robust operation with slow or noisy signals.
IOFF circuitry actively disables outputs when VCC = 0 V, blocking backflow current up to ±0.75 μA, while input tolerance extends to 3.6 V regardless of VCC level - enabling mixed-voltage interfacing in partial-power-down systems.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - supports direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters |
| Max Static Supply Current | 1.4 μA at -40 °C to +125 °C - enables multi-year battery life in always-on sensing applications |
| Propagation Delay | 1.2 ns typical at VCC = 3.3 V, CL = 5 pF - sufficient for >500 MHz clock domain bridging in low-latency control loops |
| IOFF Leakage Current | ±0.75 μA at VCC = 0 V - prevents destructive backfeed during hot-swap or staged power-up sequences |
| Operating Temperature | -40 °C to +125 °C - qualified for under-hood automotive, industrial motor drives, and outdoor wireless gateways |
| Input Threshold Hysteresis | Schmitt-trigger action - rejects <10 % VCC overshoot/undershoot and tolerates rise/fall times up to 200 ns/V |
| ESD Protection | HBM >5000 V, CDM >1000 V - meets IEC 61000-4-2 Level 4 for board-level ESD robustness |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886), 6-terminal, no leads, body dimensions 1.0 mm × 1.45 mm × 0.5 mm, thermal pad exposed on bottom.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | D | Data input - sampled on CP rising edge; Schmitt-triggered for noise margin |
| 2 | CP | Clock pulse input - positive-edge sensitive; VIH/VIL thresholds scale with VCC |
| 3 | GND | Ground reference - must be connected before VCC for safe power sequencing |
| 4 | Q | Non-inverting data output - driven high/low with VOH ≥2.3 V / VOL ≤0.5 V at 3.0 V, 4 mA load |
| 5 | n.c. | No connection - electrically isolated; no internal bond wire or silicon connection |
| 6 | VCC | Supply voltage - powers internal logic and output drivers; IOFF active when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| Ultra-low static power | ICC ≤ 1.4 μA across full -40 °C to +125 °C range - eliminates thermal derating concerns in sealed enclosures |
| IOFF partial power-down | Outputs disabled with VCC = 0 V; IOFF leakage ≤ ±0.75 μA - enables safe isolation in multi-supply SoC subsystems |
| Schmitt-trigger inputs | Hysteresis ≥ 0.3 × VCC - allows reliable sampling of slow-rising reset or wake-up signals without external RC filtering |
| Overvoltage-tolerant inputs | VI absolute max = +4.6 V independent of VCC - permits direct connection to 3.3 V buses even when VCC = 1.2 V |
| JEDEC-compliant voltage ranges | Valid across JESD8-12 (0.8–1.3 V), JESD8-11 (0.9–1.65 V), JESD8-7 (1.65–1.95 V), JESD8-5 (2.3–2.7 V), JESD8C (2.7–3.6 V) |
Applications
| Industrial Sensor Interface | Automotive Body Control Module |
|---|---|
Use Scenario: Synchronizing asynchronous interrupt signals from MEMS accelerometers into a 1.8 V MCU clock domain. IC Role / Device Role / Timing Role: Positive-edge D flip-flop capturing edge-aligned sensor alerts with sub-nanosecond setup timing. Use Value: Eliminates metastability risk while consuming <1.5 μA static current - extending battery life in wireless condition-monitoring nodes. |
Use Scenario: Debouncing door-open switch inputs before feeding to CAN transceiver enable logic in 12 V vehicle systems. IC Role / Device Role / Timing Role: Edge-triggered storage element with Schmitt-trigger inputs rejecting contact bounce noise. Use Value: Reduces firmware polling overhead and enables hardware-level signal conditioning without external RC networks. |
| Wearable Health Monitor | Smart Energy Meter |
Use Scenario: Latching heart-rate detection pulses from optical sensor ASIC into ultra-low-power 0.9 V sleep-mode processor core. IC Role / Device Role / Timing Role: Low-voltage D flip-flop operating at 0.9 V with guaranteed tpd <7 ns and ICC <0.9 μA. Use Value: Enables wake-on-event functionality with <100 nW standby power - critical for multi-week wearable battery runtime. |
Use Scenario: Isolating tamper-detection signals between 3.3 V metering SoC and 5 V PLC communication interface during brownout conditions. IC Role / Device Role / Timing Role: IOFF-enabled flip-flop preventing backfeed current when PLC rail is powered but metering rail is off. Use Value: Ensures fail-safe signal integrity and eliminates need for discrete isolation MOSFETs or diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar D-type flip-flop applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G80DBVR | Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; no Schmitt inputs | Requires ≥1.65 V supply; unsuitable for sub-1.2 V systems or partial power-down architectures | Select when interfacing with 5 V legacy peripherals and power sequencing is not required |
| 74LVC1G74GW,125 | Dual-edge triggered (D + !CP); higher propagation delay (3.5 ns min); no IOFF; same VCC range | Lacks single-edge precision; cannot replace 74AUP1G80GM in clock-domain crossing where only rising-edge capture is valid | Choose only if dual-edge behavior is explicitly needed and IOFF is not required |
Compared with SN74LVC1G80DBVR and 74LVC1G74GW,125, the 74AUP1G80GM,115 uniquely combines sub-1 V operation, IOFF isolation, and Schmitt-trigger noise immunity - making it the sole option for energy-constrained, mixed-voltage, and safety-critical edge-sampling applications.
Availability
74AUP1G80GM,115 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, wearable health monitors, and smart energy meters requiring stable component supply across extended temperature and low-power constraints.
Supply support for 74AUP1G80GM,115 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and efficient logic, analog, and discrete components for automotive, industrial, mobile, and computing markets.
The 74AUP (Advanced Ultra-low Power) logic family targets ultra-low-power digital signal conditioning and synchronization in battery-operated and thermally constrained systems, emphasizing sub-1 V operation, nanoamp ICC, and robust IOFF behavior.
FAQ
What is the minimum supply voltage at which 74AUP1G80GM,115 guarantees functional operation?
The device is fully specified from 0.8 V to 3.6 V, with guaranteed timing and logic functionality at 0.8 V across -40 °C to +125 °C. At this voltage, tpd is 20.9 ns (CL = 5 pF), VIH is 0.70 × VCC, and ICC remains ≤1.4 μA - enabling direct integration with energy-harvesting power supplies and sub-1 V microcontrollers.
Does 74AUP1G80GM,115 support hot insertion or live backplane connection?
Yes - its overvoltage-tolerant inputs (up to +4.6 V) and IOFF circuitry allow safe connection to live 3.3 V or 5 V buses while VCC is unpowered. When VCC = 0 V, outputs are high-impedance and IOFF leakage is limited to ±0.75 μA, preventing damage during hot-swap events in modular industrial controllers.
Can the n.c. pin (Pin 5) be used as a thermal pad or grounded for improved thermal performance?
No - Pin 5 is electrically unconnected with no internal bond or silicon tie. It must remain floating per Nexperia's design specification. Thermal dissipation relies solely on the exposed thermal pad on the underside of the XSON6 package (SOT886), which requires proper PCB copper pour and solder stencil design per IPC-7351B.
How does the Schmitt-trigger input improve reliability in noisy environments?
Schmitt-trigger inputs provide hysteresis ≥0.3 × VCC, meaning VIH and VIL thresholds differ by at least 300 mV at 1.0 V supply. This rejects noise spikes <10 % VCC amplitude and accommodates slow-rising signals (e.g., mechanical switch bounce or long PCB traces), eliminating false triggering without external RC filters or firmware debouncing.
74AUP1G80GM,115 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Function:
- Standard
- Type:
- D-Type
- Output Type:
- Inverted
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Clock Frequency:
- 309 MHz
- Max Propagation Delay @ V, Max CL:
- 6.4ns @ 3.3V, 30pF
- Trigger Type:
- Positive Edge
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Current - Quiescent (Iq):
- 500 nA
- Input Capacitance:
- 1.5 pF
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1G80GM,115 FAQ
1.How can I place an order for 74AUP1G80GM,115 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G80GM,115 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G80GM,115 reliable?
The price and inventory of 74AUP1G80GM,115 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G80GM,115 is usually 5 days.
3.What payment methods are accepted for 74AUP1G80GM,115?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G80GM,115 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G80GM,115?
74AUP1G80GM,115 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G80GM,115 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G80GM,115?
For technical support, including 74AUP1G80GM,115 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G80GM,115 requirements.
6.How does Aetrix verify that 74AUP1G80GM,115 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G80GM,115 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G80GM,115 meets industry standards.
7.What is the process for return or replacement of 74AUP1G80GM,115?
All 74AUP1G80GM,115 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G80GM,115, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G80GM,115 part is unused and in its original packaging.
Return procedure for 74AUP1G80GM,115:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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