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Nexperia USA Inc. 74AUP1G80GN,132

Part No.:
74AUP1G80GN,132
Manufacturer:
Nexperia USA Inc.
Category:
Flip Flops
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G80GN,132.pdf
Description:
IC FF D-TYPE SNGL 1BIT 6XSON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:4,813

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Product details

Overview

74AUP1G80GN,132 from Nexperia is a single positive-edge-triggered D-type flip-flop in an XSON6 package (0.9 × 1.0 × 0.35 mm, SOT1115), operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guarantees ≤0.9 μA max ICC at 125 °C. Used in low-power clock-domain synchronization and data sampling in battery-powered IoT sensor nodes.

For engineers reviewing the 74AUP1G80GN,132 datasheet, 74AUP1G80GN,132 pinout, 74AUP1G80GN,132 application, or 74AUP1G80GN,132 equivalent, this page delivers verified functional behavior, validated timing margins (tsu(H) = 0.4 ns @ 3.6 V), real-world package dimensions (SOT1115), and direct substitution guidance - all grounded in Nexperia's Rev. 8 product data sheet.

Technical Context

This device implements a synchronous edge-triggered storage element with transparent input-to-output propagation only on LOW-to-HIGH clock transitions. Its Schmitt-trigger inputs accept slow-rising signals without oscillation, while the IOFF circuit disables outputs during VCC = 0 V to prevent backflow current in multi-rail systems.

Designed for ultra-low-power operation across extended voltage (0.8–3.6 V) and temperature (−40 °C to +125 °C) ranges, it meets JEDEC standards JESD8-12 through JESD8C and supports dynamic power calculation via CPD = 2.9 pF at 3.6 V.

Key Specifications

ParameterValue and Actual Design Meaning
Supply Voltage Range0.8 V to 3.6 V - enables direct interface with 0.9 V logic, 1.2 V cores, and 3.3 V I/O without level shifters
Max ICC (125 °C)0.9 μA - ensures sub-1 μA static current in always-on monitoring circuits
Propagation Delay1.0 ns (min) to 4.8 ns (max) @ VCC = 3.0–3.6 V, CL = 5 pF - supports >510 MHz clock rates in high-speed sampling paths
Set-up Time (tsu(H))0.4 ns @ VCC = 3.0–3.6 V - allows tight timing closure in fast clock domains with minimal margin overhead
IOFF Leakage±0.75 μA @ VCC = 0 V - prevents damaging back-current when powered down in mixed-voltage systems
Operating Temperature−40 °C to +125 °C - qualified for under-hood automotive and industrial control environments
ESD Rating (HBM)5000 V - withstands handling and board-level ESD events without latch-up or parametric shift

Pinout & Package

XSON6 package (SOT1115): extremely thin small outline, no leads, 6 terminals, body size 0.9 × 1.0 × 0.35 mm. Pin 1 index located at lower-left corner below marking code "pT".

Pin/TerminalCircuit RoleDesign Meaning
1DData input - sampled on rising edge of CP; Schmitt-triggered for robustness against slow edges
2CPPositive-edge clock pulse - triggers synchronous capture; VIH/VIL thresholds scale with VCC
3GNDGround reference - must be connected before VCC to avoid latch-up per JEDEC JESD78 Class II
4QInverted data output - complements stored D value; drives loads up to 4 mA at 3.0 V
5n.c.No connection - electrically isolated; no internal bond wire or silicon connection
6VCCSupply voltage - powers internal logic and output stage; IOFF active when VCC = 0 V

Key Features

FeatureDesign Value
Wide VCC range (0.8–3.6 V)Eliminates need for external voltage translators in multi-supply SoC interfaces
IOFF partial power-downEnables safe hot-plug operation and rail sequencing in complex power architectures
Schmitt-trigger inputsAccepts rise/fall times up to 200 ns/V - tolerates noisy PCB traces and unbuffered MCU GPIO
Low dynamic power (CPD = 2.9 pF)Reduces switching power by >40% vs. older AUP families at same frequency and load
−40 °C to +125 °C operationValidated for engine control units, motor drives, and outdoor wireless gateways

Applications

Industrial Sensor InterfaceLow-Power Wearable Clocking

Use Scenario: Sampling analog sensor outputs (e.g., thermistor, pressure transducer) synchronized to a microcontroller's low-frequency clock.

IC Role / Device Role / Timing Role: D-type flip-flop acting as a synchronizer to eliminate metastability when crossing clock domains between sensor ADC and MCU core.

Use Value: Guarantees <0.4 ns set-up time and 1.0 ns min propagation delay at 3.3 V, enabling reliable sampling at 250 kHz with 2× timing margin.

Use Scenario: Debouncing mechanical switch inputs in compact wearable devices powered by coin-cell batteries.

IC Role / Device Role / Timing Role: Edge-triggered storage element capturing switch state on rising clock edge, with Schmitt-triggered D input rejecting contact bounce noise.

Use Value: Draws only 0.9 μA max ICC at 125 °C, extending battery life beyond 2 years in always-on monitoring mode.

Automotive Body Control ModuleIoT Edge Node Data Latching

Use Scenario: Capturing status signals (e.g., door open/close, seatbelt buckle) in 12 V vehicle systems with local 3.3 V domain regulation.

IC Role / Device Role / Timing Role: Positive-edge triggered register holding diagnostic flags for CAN message transmission.

Use Value: IOFF protection prevents back-current into powered-down CAN transceivers during sleep mode, meeting ISO 11898-2 requirements.

Use Scenario: Latching wake-up events (e.g., motion detection, button press) in battery-operated LoRaWAN end-nodes before deep-sleep entry.

IC Role / Device Role / Timing Role: Low-power D flip-flop storing interrupt source prior to MCU wake-up, with VCC = 0.8 V compatibility matching energy-harvesting PMIC outputs.

Use Value: Operates down to 0.8 V supply and −40 °C ambient, ensuring reliable event capture in outdoor deployments.

Equivalent & Alternatives

The following parts are listed as comparable options for similar D-type flip-flop applications.

Alternative PartTechnical DifferenceApplication DifferenceSelection Advice
SN74LVC1G80DBVRHigher ICC (10 μA typ), wider VCC (1.65–5.5 V), no IOFF, no Schmitt inputsLacks partial power-down and noise immunity - unsuitable for mixed-rail or noisy environmentsChoose only if 5 V tolerance is required and system lacks aggressive power sequencing.
74LVC1G74GW,125Dual D-flip-flop in TSSOP6; no IOFF; higher CPD (6.5 pF); 1.65–5.5 V VCCDouble functionality but larger footprint and higher dynamic power - increases BOM cost and layout areaSelect only when dual-channel operation justifies 2× die area and 2.2× switching capacitance.

Compared with SN74LVC1G80DBVR and 74LVC1G74GW,125, the 74AUP1G80GN,132 uniquely combines sub-μA static current, IOFF protection, Schmitt-trigger inputs, and 0.8 V operation - making it the sole choice for ultra-low-power, mixed-voltage, and noise-prone embedded designs.

Availability

74AUP1G80GN,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, low-power wearables, and IoT edge node data latching requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AUP1G80GN,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance, reliable components for automotive, industrial, mobile, and computing markets, with leadership in logic, discrete, and MOSFET technologies.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-powered and energy-constrained applications where nanowatt static consumption, wide voltage operation, and robust signal integrity are critical design requirements.

FAQ

What is the minimum supply voltage for guaranteed operation?

The 74AUP1G80GN,132 is fully specified from 0.8 V to 3.6 V. At 0.8 V, it guarantees tpd ≤20.9 ns (CL = 5 pF) and tsu(H) ≤2.5 ns, enabling use with energy-harvesting PMICs and ultra-low-voltage microcontrollers like ARM Cortex-M0+ running at 0.9 V.

Does this device support hot insertion or partial power-down?

Yes - its IOFF circuitry actively disables outputs when VCC = 0 V, limiting power-off leakage to ±0.75 μA. This prevents back-current flow into powered-down subsystems, satisfying IEC 61000-4-2 and automotive hot-swap requirements without external isolation components.

How does the Schmitt-trigger input improve system reliability?

Schmitt-trigger action provides hysteresis (typically 0.3 × VCC) on D and CP inputs, rejecting noise spikes and slow-rising signals that could cause multiple clocking or metastability. This eliminates need for external RC filters in noisy industrial or automotive environments.

Can the n.c. pin be used as a thermal pad or ground connection?

No - pin 5 is explicitly designated "n.c." (no connection) in the datasheet and has no internal bond wire or silicon connection. It must remain unconnected; soldering it to ground or thermal plane violates Nexperia's qualification and may compromise ESD performance or thermal derating.

74AUP1G80GN,132 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Function:
Standard
Type:
D-Type
Output Type:
Inverted
Number of Elements:
1
Number of Bits per Element:
1
Clock Frequency:
309 MHz
Max Propagation Delay @ V, Max CL:
6.4ns @ 3.3V, 30pF
Trigger Type:
Positive Edge
Current - Output High, Low:
4mA, 4mA
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Iq):
500 nA
Input Capacitance:
1.5 pF
Operating Temperature:
-40°C ~ 125°C (TA)
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON (0.9x1)

74AUP1G80GN,132 FAQ

1.How can I place an order for 74AUP1G80GN,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G80GN,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G80GN,132 reliable?

The price and inventory of 74AUP1G80GN,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G80GN,132 is usually 5 days.

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Once your 74AUP1G80GN,132 order is processed, you will receive an email with the shipment details and tracking number.

Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.

5.How can I obtain technical support or documentation for 74AUP1G80GN,132?

For technical support, including 74AUP1G80GN,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G80GN,132 requirements.

6.How does Aetrix verify that 74AUP1G80GN,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G80GN,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G80GN,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1G80GN,132?

All 74AUP1G80GN,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G80GN,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G80GN,132 part is unused and in its original packaging.

Return procedure for 74AUP1G80GN,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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