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Nexperia USA Inc. 74AUP1G86GS,132

Part No.:
74AUP1G86GS,132
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters
Package:
6-XFDFN
Datasheet:
Aetrix74AUP1G86GS,132.pdf
Description:
IC GATE XOR 1CH 2-INP 6XSON
Quantity:
Payment:
Payment
Shipping:
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Inventory:305

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Product details

Overview

74AUP1G86GS,132 from Nexperia is a single 2-input CMOS EXCLUSIVE-OR gate in XSON6 package (SOT1202), operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity, IOFF partial power-down protection, and guarantees ≤0.9 μA max ICC across -40 °C to +125 °C. Used in low-power logic interfacing, level translation, and signal conditioning in battery-powered IoT sensors.

For engineers reviewing the 74AUP1G86GS,132 datasheet, 74AUP1G86GS,132 pinout, 74AUP1G86GS,132 application, or 74AUP1G86GS,132 equivalent, key selection criteria include its ultra-low static current, overvoltage-tolerant 3.6 V inputs at sub-1 V VCC, IOFF-enabled system-level power gating, and guaranteed propagation delay ≤4.0 ns at 3.3 V with 5 pF load.

Technical Context

This device implements standard XOR logic (Y = A ⊕ B) with Schmitt-trigger input thresholds enabling robust operation with slow-rising or noisy signals. Its IOFF circuit actively disables outputs during VCC = 0 V, blocking backflow current and supporting hot-insertion and multi-rail partial power-down architectures.

Designed for wide-VCC compatibility, it meets JEDEC standards JESD8-12 through JESD8-B across five voltage bands and delivers <10% VCC overshoot/undershoot. Input leakage remains ≤±0.75 μA and output drive capability reaches ±4.0 mA at 3.0 V, maintaining rail-to-rail logic swing under load.

Key Specifications

Parameter Value and Actual Design Meaning
VCC Range 0.8 V to 3.6 V - supports direct interface with 0.9 V, 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters
ICC (max) 0.9 μA at -40 °C to +125 °C - enables multi-year battery life in always-on sensor nodes
tpd (max) 4.0 ns at VCC = 3.0–3.6 V, CL = 5 pF - sufficient for 100+ MHz clock-domain crossing in low-power microcontrollers
IOFF Leakage ±0.75 μA at VCC = 0 V - prevents cross-conduction and bus contention when upstream logic is powered down
VIH/VIL Thresholds VIL ≤0.30×VCC, VIH ≥0.70×VCC (at 0.8 V); hysteresis ≥0.1×VCC - rejects >100 mV of input noise on slow edges
ESD Rating HBM >5000 V, CDM >1000 V - survives handling and board assembly without external protection
Operating Temp -40 °C to +125 °C - qualified for automotive under-hood and industrial motor-control environments

Pinout & Package

XSON6 package (SOT1202): 1.0 mm × 1.0 mm × 0.35 mm body, no leads, 6-terminal land-grid array with wettable flanks; pin 1 marked by corner notch.

Pin/Terminal Circuit Role Design Meaning
1 A Primary logic input; Schmitt-triggered, overvoltage-tolerant to 3.6 V independent of VCC
2 B Secondary logic input; identical electrical characteristics to Pin 1
3 GND Digital ground reference; must be connected before VCC for ESD-safe power sequencing
4 Y Inverted XOR output; drives loads up to ±4.0 mA while maintaining VOL ≤0.50 V at 3.0 V
5 n.c. No internal connection; electrically isolated; may be left floating or tied to GND for mechanical stability
6 VCC Supply rail; IOFF circuit monitors this node to disable outputs when VCC = 0 V

Key Features

Feature Design Value
Ultra-low static power ICC ≤0.9 μA max across full temperature and voltage range - eliminates quiescent drain in sleep-mode systems
IOFF partial power-down Output high-impedance state activated automatically when VCC = 0 V - enables safe interconnection of powered/unpowered subsystems
Schmitt-trigger inputs Hysteresis ≥0.1×VCC with VIH/VIL thresholds scaling with VCC - accepts degraded signals from long PCB traces or RC-filtered sources
Overvoltage-tolerant I/O Inputs withstand 3.6 V regardless of VCC (down to 0.8 V) - simplifies mixed-voltage board design and eliminates external clamping diodes
Small-footprint packaging SOT1202 (1.0 × 1.0 mm) with wettable flanks - supports automated optical inspection and high-density layout in space-constrained wearables

Applications

Industrial Sensor Interface Low-Power Wearable Logic

Use Scenario: Interfacing analog sensor outputs (e.g., thermistor divider, hall-effect signal) to an ultra-low-power MCU ADC input with noise-prone wiring.

IC Role / Device Role / Timing Role: Signal conditioning XOR gate acting as edge detector or glitch filter; Schmitt inputs clean slow-rising analog comparator outputs.

Use Value: Eliminates need for external RC filtering and pull-up resistors; enables direct connection to 1.8 V MCU GPIO while accepting 3.3 V sensor swings.

Use Scenario: Implementing button debouncing and mode-switch logic in a coin-cell-powered fitness tracker with strict 5 μA sleep budget.

IC Role / Device Role / Timing Role: Standalone combinatorial logic element performing XOR-based state transition detection between two mechanical switches.

Use Value: Draws only 0.9 μA in standby; IOFF prevents current leakage into unpowered MCU domain during deep-sleep cycles.

Automotive Body Control Medical Diagnostic Equipment

Use Scenario: Generating wake-up pulses from door-open and ignition-status signals in a 12 V vehicle body controller using 3.3 V logic rails.

IC Role / Device Role / Timing Role: Dual-input XOR used as exclusive OR gate for fault-detection logic comparing redundant sensor paths.

Use Value: Guaranteed operation at -40 °C to +125 °C; overvoltage tolerance protects against load-dump transients on shared 3.3 V bus lines.

Use Scenario: Isolating patient-connected analog front-end signals from digital processing unit in portable ECG monitor with dual power domains.

IC Role / Device Role / Timing Role: Level-shifting and signal routing gate enabling safe communication between isolated 1.2 V analog ASIC and 3.3 V ARM Cortex-M host.

Use Value: IOFF blocks backfeed during analog domain power cycling; low noise (<10% VCC) ensures signal integrity for microvolt-level biopotential measurements.

Equivalent & Alternatives

The following parts are listed as comparable options for similar XOR gate applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G86DBVR Wider VCC range (1.65–5.5 V); higher ICC (10 μA typ); no IOFF; no Schmitt inputs Requires external level shifting below 1.65 V; unsuitable for partial power-down systems Select when interfacing legacy 5 V peripherals and higher-speed timing (>100 MHz) is required
74LVC1G86GW,125 Same SOT353-1 package; identical IOFF and Schmitt features; higher max tpd (7.7 ns @ 1.65 V) Larger footprint (2.2 × 1.35 mm vs. 1.0 × 1.0 mm); lower thermal performance in sealed enclosures Select when board reworkability or hand-soldering is prioritized over size and thermal density

Compared with SN74LVC1G86DBVR and 74LVC1G86GW,125, the 74AUP1G86GS,132 uniquely combines sub-1 V operation, nanowatt ICC, and IOFF in a 1 mm² footprint-making it optimal for energy-harvesting and miniaturized medical devices where every microwatt and square millimeter matters.

Availability

74AUP1G86GS,132 is available at Aetrix Electronics and suitable for industrial sensor interface, low-power wearable logic, automotive body control, and medical diagnostic equipment requiring stable component supply across extended temperature ranges and long production lifecycles.

Supply support for 74AUP1G86GS,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert focused on essential efficiency-enhancing components including logic, discrete, and MOSFET devices, serving automotive, industrial, and consumer markets with high-volume reliability.

The 74AUP (Advanced Ultra-low Power) logic family targets battery-operated and energy-sensitive applications, delivering best-in-class static/dynamic power trade-offs while maintaining full JEDEC-compliant interoperability.

FAQ

Can 74AUP1G86GS,132 operate reliably at 0.85 V supply?

Yes. The device is fully specified from 0.8 V to 3.6 V, with VIH ≥0.70×VCC and VIL ≤0.30×VCC at 0.8 V, and propagation delay ≤21.2 ns (typ) at 0.8 V with 5 pF load. All static and dynamic parameters are guaranteed across this range per datasheet Table 6 and Table 8.

What happens to the output when VCC is disconnected?

When VCC = 0 V, the IOFF circuit activates, forcing the Y output into a high-impedance state with leakage ≤±0.75 μA. This prevents back-current flow from other powered devices on the same bus, protecting both the 74AUP1G86GS,132 and connected circuitry during partial power-down sequences.

Is the n.c. pin (Pin 5) required to be grounded?

No. Pin 5 is not internally connected and may be left floating. However, grounding it improves mechanical stability during reflow and reduces potential for solder bridging in high-density layouts. It has no electrical effect on device function or specifications.

How does Schmitt-trigger action improve noise immunity?

Schmitt-trigger inputs provide hysteresis ≥0.1×VCC, meaning the threshold for rising edges (VIH) is significantly higher than for falling edges (VIL). This prevents multiple toggles caused by slow or noisy transitions, allowing reliable operation with rise/fall times up to 200 ns/V - critical for signals from RC-filtered sensors or long cables.

74AUP1G86GS,132 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
6-XFDFN
Packaging:
Tape & Reel (TR)
Product Status:
Active
Logic Type:
XOR (Exclusive OR)
Number of Circuits:
1
Number of Inputs:
2
Features:
-
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
4mA, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
7.1ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
6-XSON, SOT1202 (1x1)

74AUP1G86GS,132 FAQ

1.How can I place an order for 74AUP1G86GS,132 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G86GS,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

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The price and inventory of 74AUP1G86GS,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G86GS,132 is usually 5 days.

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5.How can I obtain technical support or documentation for 74AUP1G86GS,132?

For technical support, including 74AUP1G86GS,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G86GS,132 requirements.

6.How does Aetrix verify that 74AUP1G86GS,132 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G86GS,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G86GS,132 meets industry standards.

7.What is the process for return or replacement of 74AUP1G86GS,132?

All 74AUP1G86GS,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G86GS,132, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G86GS,132 part is unused and in its original packaging.

Return procedure for 74AUP1G86GS,132:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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