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Nexperia USA Inc. 74AUP1G86GX,125

Part No.:
74AUP1G86GX,125
Manufacturer:
Nexperia USA Inc.
Category:
Gates and Inverters
Package:
4-XFDFN Exposed Pad
Datasheet:
Aetrix74AUP1G86GX,125.pdf
Description:
IC GATE XOR 1CH 2-INP 5X2SON
Quantity:
Payment:
Payment
Shipping:
Shipping

Inventory:8,903

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Product details

Overview

74AUP1G86GX,125 from Nexperia is a single 2-input CMOS EXCLUSIVE-OR gate in X2SON5 (SOT1226-3) package, operating from 0.8 V to 3.6 V supply. It features Schmitt-trigger inputs for noise immunity against slow signal edges, IOFF partial power-down protection, and guaranteed operation from –40 °C to +125 °C. Used in low-power logic interfacing, level translation, and sensor signal conditioning in battery-powered IoT nodes.

For engineers reviewing the 74AUP1G86GX,125 datasheet, 74AUP1G86GX,125 pinout, 74AUP1G86GX,125 application, or 74AUP1G86GX,125 equivalent, this device is selected for ultra-low static current (≤1.4 μA), rail-to-rail input tolerance up to 3.6 V, sub-5 ns propagation delay at 3.3 V/CL=5 pF, and thermal-enhanced X2SON5 packaging for high-density PCB layouts.

Technical Context

This device implements standard XOR logic with Schmitt-trigger inputs enabling robust operation with slow-rising signals (Δt/ΔV ≤ 200 ns/V) and high noise immunity. The IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.

It complies with JEDEC standards across five voltage bands (JESD8-12 through JESD8-B) and supports mixed-voltage system interfacing due to overvoltage-tolerant inputs rated to 3.6 V independent of VCC.

Key Specifications

Parameter Value and Actual Design Meaning
VCC Range 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters
ICC (max) 1.4 μA at –40 °C to +125 °C - ensures <1.5 μW static power at 1.8 V, critical for always-on sensor nodes
tpd (max) 5.2 ns at VCC = 3.0–3.6 V, CL = 5 pF - supports >100 MHz toggle rates in low-capacitance signal paths
VIH/VIL VIL ≤ 0.3×VCC, VIH ≥ 0.7×VCC (min) - provides >40% noise margin at 1.8 V and >60% at 3.3 V
IOFF Leakage ±0.75 μA at VCC = 0 V - prevents cross-current in multi-rail systems during partial power-down sequences
ESD Rating HBM >5000 V, CDM >1000 V - meets IEC 61000-4-2 Level 4 for board-level ESD robustness

Pinout & Package

X2SON5 plastic thermal enhanced extremely thin small outline package; no leads; 5 terminals; body 0.8 × 0.8 × 0.32 mm (SOT1226-3). Pin 1 indicator located on lower left corner below marking code "pH".

Pin/Terminal Circuit Role Design Meaning
1 B Primary data input with Schmitt-trigger threshold; accepts slow edges and noisy signals
2 A Secondary data input with identical Schmitt-trigger behavior; interchangeable with Pin 1
3 GND Dedicated ground reference; must be connected to system 0 V plane for stable logic thresholds
4 Y CMOS push-pull output; drives high/low to within 0.11 V of rails at 4 mA load
5 VCC Supply voltage input; decoupling capacitor (100 nF) required within 2 mm for noise suppression

Key Features

Feature Design Value
Schmitt-trigger inputs Enables reliable switching with rise/fall times up to 200 ns/V - eliminates need for external RC filtering in noisy environments
IOFF partial power-down Blocks backflow current when VCC = 0 V - allows hot-swapping and safe sequencing in multi-supply systems
Rail-to-rail input tolerance Accepts inputs up to 3.6 V regardless of VCC setting - simplifies interconnection between 1.8 V and 3.3 V subsystems
Ultra-low ICC Max 1.4 μA over full temperature range - extends battery life in coin-cell-powered wearables beyond 10 years
Thermal-enhanced X2SON5 0.8 × 0.8 mm footprint with 0.32 mm height - delivers 30% lower thermal resistance than standard XSON6 packages

Applications

Industrial Sensor Interface Low-Power Wearable Logic

Use Scenario: Interfacing analog sensor outputs (e.g., thermistor bridges) to microcontroller ADC triggers via edge-detection XOR gates.

IC Role / Device Role / Timing Role: Signal conditioning XOR gate converting differential sensor transitions into clean digital pulses.

Use Value: Schmitt-trigger inputs reject EMI-induced glitches on long sensor traces; IOFF prevents current leakage during MCU sleep modes.

Use Scenario: Implementing wake-up logic in hearable devices where motion and button events must OR-combine to exit deep-sleep state.

IC Role / Device Role / Timing Role: Low-static-power combinatorial logic element generating interrupt-enable signals from multiple asynchronous sources.

Use Value: 1.4 μA max ICC minimizes quiescent drain; 0.8 V minimum VCC allows operation directly from depleted Li-ion cells down to 2.8 V.

USB-C Port Detection IoT Node Status Indication

Use Scenario: Detecting USB-C plug orientation by XOR-ing CC1 and CC2 line states to determine cable flip status.

IC Role / Device Role / Timing Role: Single-gate logic comparator translating dual-biased CC pin voltages into orientation flag.

Use Value: Overvoltage-tolerant inputs withstand ±20 V transients per USB-C spec; 3.6 V absolute max rating protects against VBUS coupling.

Use Scenario: Driving bi-color LED status indicators in smart meters using XOR to invert polarity based on firmware command and hardware fault signal.

IC Role / Device Role / Timing Role: Polarity-control logic gate toggling LED anode/cathode drive configuration.

Use Value: Push-pull Y output delivers 4 mA sink/source at 3.3 V - sufficient to drive LEDs without external transistors; compact X2SON5 saves space on constrained meter PCBs.

Equivalent & Alternatives

The following parts are listed as comparable options for similar 2-input XOR gate applications.

Alternative Part Technical Difference Application Difference Selection Advice
SN74LVC1G86DBVR Higher ICC (max 10 μA), wider VCC (1.65–5.5 V), no Schmitt inputs, SOT-23-5 package Lacks noise immunity on slow edges; requires external filtering in EMI-prone environments Select when interfacing 5 V systems or needing higher drive strength (32 mA), but avoid in battery-critical or noisy sensor paths
74LVC1G86GW,125 Same logic function, TSSOP5 (SOT353-1) package, 1.25 mm body width, slightly higher thermal resistance Compatible pinout but larger footprint; lacks thermal enhancement of X2SON5 Choose for legacy board compatibility or hand-soldering preference; not optimal for ultra-dense or thermally constrained layouts

Compared with SN74LVC1G86DBVR and 74LVC1G86GW,125, the 74AUP1G86GX,125 uniquely combines sub-2 μA static current, Schmitt-trigger noise rejection, and 0.8 mm² thermal-enhanced packaging - making it the only option qualified for extended-life, high-noise, space-constrained applications like medical patches and industrial wireless sensors.

Availability

74AUP1G86GX,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, low-power wearable logic, USB-C port detection, and IoT node status indication requiring stable component supply across automotive-grade temperature ranges.

Supply support for 74AUP1G86GX,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in consumer, industrial, and automotive markets.

The 74AUP (Advanced Ultra-low Power) product line targets battery-operated and energy-harvesting systems, emphasizing sub-microamp ICC, wide VCC scalability, and robust IO architecture for next-generation portable electronics.

FAQ

Does 74AUP1G86GX,125 support true bidirectional signal routing?

No. This is a unidirectional XOR gate with defined inputs (A, B) and output (Y). Its IOFF feature only disables output drive during power-down - it does not enable bus-hold or bidirectional data flow. For bidirectional applications, discrete switches or dedicated bus transceivers are required.

Can 74AUP1G86GX,125 be used with 0.8 V VCC while driving a 5 pF load at 10 MHz?

Yes. At VCC = 0.8 V and CL = 5 pF, typical propagation delay is 21.2 ns (tPHL/tPLH), supporting maximum toggle frequencies above 20 MHz. Static current remains ≤0.5 μA, and output drive capability (VOH/VOL) is maintained per datasheet Table 7 limits.

What is the significance of the "X" in 74AUP1G86GX?

The "X" suffix denotes the X2SON5 package variant (SOT1226-3), distinguishing it from GW (TSSOP5), GM/GN/GS (XSON6 variants). This package offers the smallest footprint (0.8 × 0.8 mm) and lowest thermal resistance among all 74AUP1G86 options, optimized for high-density PCBs.

Is the 74AUP1G86GX,125 pin-compatible with older 74AUP1G86 variants?

No. While functional equivalence exists, pin mapping differs: X2SON5 (SOT1226-3) uses 5-pin layout (B-A-GND-Y-VCC), whereas TSSOP5 (SOT353-1) places VCC at Pin 5 and GND at Pin 3 - same order but incompatible pad geometry and thermal pad presence. Layout redesign is required for migration.

74AUP1G86GX,125 Specifications

Product attributes
Attribute value
Manufacturer:
Nexperia USA Inc.
Series:
74AUP
Package/Case:
4-XFDFN Exposed Pad
Packaging:
Tape & Reel (TR)
Product Status:
Active
Logic Type:
XOR (Exclusive OR)
Number of Circuits:
1
Number of Inputs:
2
Features:
-
Voltage - Supply:
0.8V ~ 3.6V
Current - Quiescent (Max):
500 nA
Current - Output High, Low:
4mA, 4mA
Input Logic Level - Low:
0.7V ~ 0.9V
Input Logic Level - High:
1.6V ~ 2V
Max Propagation Delay @ V, Max CL:
7.1ns @ 3.3V, 30pF
Operating Temperature:
-40°C ~ 125°C
Grade:
-
Qualification:
-
Mounting Type:
Surface Mount
Supplier Device Package:
5-X2SON (0.80x0.80)

74AUP1G86GX,125 FAQ

1.How can I place an order for 74AUP1G86GX,125 through Aetrix?

Please submit a Request for Quotation (RFQ) for 74AUP1G86GX,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.

2.Are the price and stock information for 74AUP1G86GX,125 reliable?

The price and inventory of 74AUP1G86GX,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G86GX,125 is usually 5 days.

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5.How can I obtain technical support or documentation for 74AUP1G86GX,125?

For technical support, including 74AUP1G86GX,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G86GX,125 requirements.

6.How does Aetrix verify that 74AUP1G86GX,125 is sourced from the original manufacturer or authorized distributors?

All 74AUP1G86GX,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G86GX,125 meets industry standards.

7.What is the process for return or replacement of 74AUP1G86GX,125?

All 74AUP1G86GX,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G86GX,125, returns or replacements are accepted under the following conditions:

1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.

2.The issue is reported within 90 days of delivery.

3.The 74AUP1G86GX,125 part is unused and in its original packaging.

Return procedure for 74AUP1G86GX,125:

1.Submit a request within 90 days.

2.Obtain a Return Material Authorization (RMA) from Aetrix.

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