Diodes Incorporated 74AUP1G97FW4-7

Overview

74AUP1G97FW4-7 from Diodes Incorporated is a single 3-input configurable multiple-function logic gate in X2-DFN1010-6 package, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer functions via input configuration. It operates from 0.8V to 3.6V, delivers ±4mA output drive at 3.0V, features Schmitt-trigger inputs (950mV hysteresis @ 3.0V), and supports IOFF for partial power-down isolation. It is used in battery-powered voltage-level translation and low-power signal routing in portable electronics.

For engineers reviewing the 74AUP1G97FW4-7 datasheet, 74AUP1G97FW4-7 pinout, 74AUP1G97FW4-7 application, or 74AUP1G97FW4-7 equivalent, key selection criteria include its ultra-low static current (<0.9µA), 3.0V-compatible 3.6V-tolerant inputs, sub-4ns propagation delay at 3.3V/CL=5pF, IOFF-enabled power-gating capability, and DFN1010 footprint compatibility with space-constrained PCB layouts.

Technical Context

The device implements a programmable 3-input combinational logic cell where the output Y is determined by all eight possible combinations of inputs A, B, and C - enabling functional reconfiguration without external components. Its Schmitt-trigger inputs provide noise immunity with hysteresis ranging from 0.07V (0.8V VCC) to 1.31V (3.0V VCC), making it robust against slow-rising/falling signals in mixed-voltage systems.

IOFF circuitry actively disables the output when VCC = 0V, blocking reverse current flow and enabling safe hot-insertion or partial system power-down. The logic diagram confirms a single-stage gate structure with no internal latching or clocking - strictly combinational behavior with propagation delays specified down to 1.0ns (typical, 3.3V, CL=5pF).

Key Specifications

Pinout & Package

X2-DFN1010-6 package: 1.0mm × 1.0mm × 0.4mm body, 0.35mm pitch, 6-terminal leadless construction with exposed thermal pad (not electrically connected). RoHS-compliant, halogen-free, and fully compatible with reflow soldering per J-STD-020.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G97DBVR, 74AUP1G97FW4-7 enables true single-supply operation down to 0.8V and provides essential IOFF protection - critical for battery-backed or multi-rail embedded systems. Against 74AUP1G57GW,125, it offers identical ultra-low-power performance but in a smaller 1.0×1.0mm DFN package with optimized pin arrangement for compact routing.

Availability

74AUP1G97FW4-7 is available at Aetrix Electronics and suitable for battery-powered wearables, IoT edge sensors, and portable display interfaces requiring stable component supply, long-term lifecycle support, and consistent DFN1010 packaging.

Supply support for 74AUP1G97FW4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Diodes Incorporated is a global manufacturer of discrete semiconductors and analog ICs, specializing in high-efficiency power management, signal integrity, and precision timing solutions for consumer, industrial, and automotive markets.

The 74AUP logic family targets ultra-low-power portable electronics, emphasizing sub-1V operation, nanowatt static consumption, and robust noise immunity - directly addressing design constraints in energy-harvesting and coin-cell-powered devices.

FAQ

What logic functions can be implemented with the 74AUP1G97FW4-7?

The device implements eight distinct logic functions via its three inputs: 2-to-1 multiplexer, 2-input AND, OR, NAND, NOR (with one or both inputs inverted), inverter, and non-inverting buffer. The function is selected solely by hardwiring A, B, and C to VCC or GND - no external programming or configuration pins are required.

Does the 74AUP1G97FW4-7 support mixed-voltage operation?

Yes - its inputs tolerate up to 3.6V regardless of VCC setting (0.8V–3.6V), enabling reliable level shifting from higher-voltage peripherals (e.g., 3.3V sensors) to lower-voltage processors (e.g., 1.2V SoCs). Output swing tracks VCC, ensuring clean logic thresholds for downstream receivers.

How does the IOFF feature protect the circuit during power-down?

When VCC drops to 0V, the IOFF circuit disables the output driver stage, presenting a high-impedance state at Y. This prevents reverse current flow from live inputs (e.g., 3.3V signals still active on A/B/C) into the unpowered VCC rail - eliminating risk of latch-up or unintended power injection into adjacent subsystems.

Can the Schmitt-trigger inputs be bypassed for standard CMOS behavior?

No - Schmitt action is inherent to the input structure and cannot be disabled. However, the hysteresis (0.79–1.31V depending on VCC) is intentionally designed to improve noise margin without degrading speed; for most digital interfaces, this enhances reliability rather than limiting functionality.