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Nexperia USA Inc. 74AUP1G97GW,125
- Part No.:
- 74AUP1G97GW,125
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP1G97GW,125.pdf
- Description:
- IC CONFIG MULT-FUNC GATE 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:11,558
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Product details
Overview
74AUP1G97GW,125 from Nexperia is a low-power configurable multiple-function logic gate with Schmitt-trigger inputs, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer configurations via its 3-bit input control (A/B/C). It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at -40 °C to +125 °C, and features IOFF circuitry for partial power-down protection in battery-backed or hot-swap systems.
For engineers reviewing the 74AUP1G97GW,125 datasheet, 74AUP1G97GW,125 pinout, 74AUP1G97GW,125 application, or 74AUP1G97GW,125 equivalent, this device is selected for ultra-low static/dynamic power logic reconfiguration in space-constrained industrial sensors, portable medical monitors, and IoT edge nodes where voltage scalability and noise immunity are critical.
Technical Context
The 74AUP1G97 implements a single-output combinational logic block whose function is determined by the logic state of three inputs (A, B, C), enabling real-time reconfiguration without external programming. Its Schmitt-trigger inputs provide ≥0.5 V hysteresis (VH) at VCC = 3.0 V, ensuring robust noise rejection in noisy environments such as motor control feedback paths or automotive body electronics.
IOFF circuitry actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA max - a key enabler for multi-rail systems with asynchronous power sequencing. The device complies with JEDEC standards JESD8-12 through JESD8C across its full 0.8–3.6 V operating range, guaranteeing interoperability with mixed-voltage I/O domains.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage | 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC | 0.9 μA at -40 °C to +125 °C - ensures <1 μW static power at 1.8 V, critical for always-on sensor nodes. |
| Propagation Delay | 1.5 ns min / 4.3 ns max at VCC = 3.0 V, CL = 5 pF - supports >200 MHz toggle rates in high-speed configuration switching. |
| Input Hysteresis (VH) | 0.79–1.31 V at VCC = 3.0 V - rejects up to 43% VCC noise amplitude on input lines, eliminating false triggering. |
| IOFF Leakage | ±0.75 μA max at VCC = 0 V - prevents damaging back-current during partial power-down in modular subsystems. |
| ESD Rating | HBM >5000 V, CDM >1000 V - meets IEC 61000-4-2 Level 4 requirements for handheld and field-deployable equipment. |
| Operating Temp | -40 °C to +125 °C - qualified for under-hood automotive, industrial PLC, and outdoor telecom applications. |
Pinout & Package
TSSOP6 plastic thin shrink small outline package (SOT363-2); 6 leads; body width 1.25 mm; pin pitch 0.65 mm; exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (B) | Data input | One of three configurable logic inputs; accepts 0 V to 3.6 V regardless of VCC (overvoltage tolerant). |
| 2 (GND) | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance for noise immunity. |
| 3 (A) | Data input | Primary logic select input; tied to GND/VCC to define function per Table 4 and Table 5. |
| 4 (Y) | Configurable output | Single CMOS push-pull output capable of driving 4 mA at 3.0 V; supports fan-out of ≥10 AUP loads. |
| 5 (VCC) | Supply voltage | Power rail for core logic and output stage; decoupling capacitor (100 nF) required within 3 mm. |
| 6 (C) | Data input | Third logic input; combined with A and B to select among seven logic functions per functional table. |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range | 0.8–3.6 V operation eliminates need for separate voltage regulators in multi-supply systems. |
| Schmitt-trigger inputs | ≥0.5 V hysteresis at 3.0 V enables reliable signal conditioning of slow or noisy analog-like digital signals. |
| IOFF partial power-down | Output disable at VCC = 0 V prevents back-current flow, allowing safe insertion/removal in live backplanes. |
| Overvoltage tolerant inputs | Inputs withstand up to 3.6 V independent of VCC - supports interfacing with higher-voltage peripherals. |
| Low dynamic power | CPD = 4.3 pF at 3.3 V enables <15 μW dynamic dissipation at 1 MHz toggle rate (CL = 5 pF). |
Applications
| Industrial Sensor Interface | Portable Medical Monitor |
|---|---|
|
Use Scenario: Signal conditioning and logic-level translation between MEMS pressure sensor (1.8 V) and 3.3 V microcontroller ADC trigger line. IC Role / Device Role / Timing Role: Configured as inverter with Schmitt input to clean noisy sensor wake-up pulses before MCU interrupt assertion. Use Value: Eliminates external RC filter and discrete inverter, reducing BOM count by 2 components while improving noise margin by 40%. |
Use Scenario: Enabling/disabling LED status indicators and buzzer drivers based on battery voltage thresholds in wearable ECG patch. IC Role / Device Role / Timing Role: Configured as 2-input MUX to select between low-battery alert (active-high) and normal operation (active-low) outputs. Use Value: Single-gate solution replaces dual discrete logic ICs, saving 2.5 mm² PCB area and cutting standby current by 0.7 μA. |
| Automotive Body Control Module | IoT Edge Node Power Sequencing |
|
Use Scenario: Debouncing and polarity inversion of door latch switch signals before CAN transceiver input in 12 V vehicle architecture. IC Role / Device Role / Timing Role: Configured as buffer with Schmitt input to reject EMI-induced glitches on long harness runs. Use Value: Achieves >6 kV ESD immunity and 100 ns pulse rejection without external RC network, meeting ISO 10605 Class 3B. |
Use Scenario: Controlling enable sequencing of RF SoC, PMIC, and flash memory in LPWA gateway during cold start. IC Role / Device Role / Timing Role: Configured as AND gate with IOFF to isolate downstream rails until main 3.3 V supply stabilizes. Use Value: Prevents latch-up during power ramp-up by blocking backfeed current, eliminating need for external load switches. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar configurable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G97DBVR | Higher ICC (max 10 μA), no IOFF, VCC min 1.65 V, non-Schmitt inputs | Lacks partial power-down and noise immunity; unsuitable for battery-critical or noisy environments | Select only if cost is primary constraint and system operates exclusively at ≥1.65 V with clean signals. |
| 74LVC1G57GW,125 | Same package and pinout; identical Schmitt inputs and IOFF; slightly higher propagation delay (5.1 ns max) | Functionally identical but optimized for lower-cost LVC family; same thermal profile and footprint | Drop-in replacement where AUP's ultra-low ICC is not required; offers 15% cost reduction in volume production. |
Compared with SN74LVC1G97DBVR, the 74AUP1G97GW,125 provides 11× lower static current and robust noise immunity; versus 74LVC1G57GW,125, it delivers 18% faster propagation with identical footprint and IOFF behavior - making it optimal for energy-sensitive, high-reliability designs.
Availability
74AUP1G97GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable medical monitors, automotive body control modules, and IoT edge node power sequencing requiring stable component supply across extended temperature ranges.
Supply support for 74AUP1G97GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, discrete, and MOSFET solutions for automotive, industrial, and consumer markets.
The 74AUP1G97 belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, engineered specifically for battery-powered and thermally constrained applications demanding sub-microamp quiescent current and wide-voltage interoperability.
FAQ
What logic functions can the 74AUP1G97GW,125 implement?
The device supports seven configurable functions - 2-input MUX, AND, OR, NAND, NOR, inverter, and buffer - determined solely by the logic states of its three inputs (A, B, C) as defined in Table 4 and Table 5 of the datasheet. No external programming or configuration pins are required; function selection is purely combinatorial.
Does the 74AUP1G97GW,125 require external pull-up or pull-down resistors on inputs?
No. All inputs (A, B, C) can be directly tied to VCC or GND without external resistors due to their overvoltage-tolerant design and internal clamping structure. This simplifies board layout and eliminates resistor placement errors in high-density designs.
How does the IOFF feature behave during power-down sequences?
When VCC drops to 0 V, the IOFF circuitry automatically disables the Y output, limiting leakage current to ±0.75 μA maximum. This prevents reverse current flow from powered downstream circuits into the unpowered gate, protecting both the device and connected ICs during hot-swap or partial shutdown events.
Can the 74AUP1G97GW,125 drive standard 50 Ω transmission lines?
No. With a typical output drive strength of ±4 mA at 3.0 V, it is designed for point-to-point CMOS loading (≤10 pF) and short PCB traces, not 50 Ω impedance matching. For transmission line driving, a dedicated buffer like NX3LV533 must be used upstream.
74AUP1G97GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Configurable Multiple Function
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Schmitt Trigger Input:
- Yes
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
74AUP1G97GW,125 FAQ
1.How can I place an order for 74AUP1G97GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G97GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G97GW,125 reliable?
The price and inventory of 74AUP1G97GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G97GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G97GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G97GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G97GW,125?
74AUP1G97GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G97GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G97GW,125?
For technical support, including 74AUP1G97GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G97GW,125 requirements.
6.How does Aetrix verify that 74AUP1G97GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G97GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G97GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G97GW,125?
All 74AUP1G97GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G97GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G97GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G97GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP1G97GW,125 Tags
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SN74LVC1G97DCKR
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SN74LVC1G97DRLR
Texas Instruments
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SN74LVC1G97DBVR
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NC7SZ57P6X
onsemi
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SN74LVC1G97DCKT
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MC100EP05DTR2G
onsemi
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MC100EP08DTR2G
onsemi
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NB7L86AMNHTBG
onsemi
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HMC722LP3E
Analog Devices Inc.
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74LVC1G97GW,125
Nexperia USA Inc.
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74LVC1G57GW,125
Nexperia USA Inc.
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74LVC1G97GV,125
Nexperia USA Inc.
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