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Diodes Incorporated 74AUP1G98FW4-7
- Part No.:
- 74AUP1G98FW4-7
- Manufacturer:
- Diodes Incorporated
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1G98FW4-7.pdf
- Description:
- IC GATE SGL GATE X2-DFN1010-6
- Quantity:
- Payment:
- Shipping:
Inventory:5,000
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Product details
Overview
74AUP1G98FW4-7 from Diodes Incorporated is a single 3-input configurable multiple-function logic gate in X2-DFN1010-6 package, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer configurations via input pin states. It operates from 0.8V to 3.6V, features ±4mA output drive at 3.0V, Schmitt-trigger inputs (950mV hysteresis @ 3.0V), and IOFF partial-power-down protection. It enables voltage-level shifting and low-power signal routing in portable electronics.
For engineers reviewing the 74AUP1G98FW4-7 datasheet, 74AUP1G98FW4-7 pinout, 74AUP1G98FW4-7 application, or 74AUP1G98FW4-7 equivalent, this device serves as a flexible, ultra-low-power logic building block for mixed-voltage battery-powered systems requiring configurable combinational logic with robust noise immunity and power-gating capability.
Technical Context
The 74AUP1G98 implements a single 3-input lookup-table (LUT) structure where inputs A, B, and C define eight possible output states (Y) per the function table. Its Schmitt-trigger inputs provide hysteresis (0.79–1.31V ΔVT across VCC range), enabling reliable operation with slow-rising/falling signals in noisy environments.
IOFF circuitry actively disables the output when VCC = 0V, preventing back-current flow during partial power-down - critical for system-level power sequencing in multi-rail designs. Input tolerance up to 3.6V allows interfacing with higher-voltage logic while powered from as low as 0.8V.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8V to 3.6V - supports direct integration into sub-1V digital cores and 3.3V I/O domains without level shifters. |
| Output Drive | ±4mA @ 3.0V - sufficient to drive standard CMOS loads (e.g., 50pF) with <4.4ns propagation delay (CL=5pF). |
| Input Hysteresis | Typ. 950mV @ VCC = 3.0V - rejects noise on slow edges, eliminating need for external RC filtering in sensor or switch interfaces. |
| IOFF Leakage | ±0.6μA max @ –40°C to +125°C - ensures safe isolation during power sequencing without loading powered-down rails. |
| Quiescent Current | 0.9μA max @ 3.6V - enables always-on logic functions in battery-critical applications like RTC enable paths. |
| Propagation Delay | 1.0ns min / 4.0ns typ @ 3.3V, CL=5pF - meets timing requirements for 100+ MHz control-path logic in portable SoC peripherals. |
| ESD Protection | HBM >2000V, CDM >1000V - withstands handling and board-level ESD events without external protection diodes. |
Pinout & Package
X2-DFN1010-6 (1.0mm × 1.0mm × 0.4mm, 0.35mm pitch) - ultra-compact leadless package optimized for space-constrained portable PCBs.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (A) | Data Input | Configurable logic input; Schmitt-triggered, 3.6V-tolerant, used with B and C to select function (e.g., MUX select or gate input). |
| 2 (B) | Data Input | Configurable logic input; identical electrical behavior to A and C; determines output state per truth table. |
| 3 (GND) | Ground Reference | Primary return path for supply and signals; must be low-impedance to maintain noise margin and switching integrity. |
| 4 (VCC) | Power Supply | Core supply rail (0.8–3.6V); powers internal logic and output stage; IOFF active when VCC = 0V. |
| 5 (Y) | Push-Pull Output | Active-high/low CMOS output; drives loads directly; no external pull-up required; supports bus-hold if configured as buffer. |
| 6 (C) | Data Input | Third configurable input; defines function selection (e.g., C=L selects Y=B; C=H selects Y=A in 2:1 MUX mode). |
Key Features
| Feature | Design Value |
|---|---|
| Configurable Logic Function | Single gate emulates MUX, AND, OR, NAND, NOR, inverter, or buffer - reduces BOM count and PCB footprint vs. fixed-function alternatives. |
| Schmitt-Trigger Inputs | 950mV typical hysteresis @ 3.0V - eliminates contact bounce and EMI-induced glitches in push-button, sensor, or mechanical switch interfaces. |
| IOFF Partial Power-Down | Output disabled with VCC = 0V; leakage ≤ ±0.6μA - prevents backfeeding and latch-up when subsystems power down independently. |
| Ultra-Low Static Power | ICC ≤ 0.9μA @ 3.6V - enables permanent connection to always-on rails (e.g., VBAT) without measurable battery drain. |
| Wide-Voltage I/O Tolerance | Inputs tolerate 0–3.6V regardless of VCC setting - simplifies level translation between 1.2V core and 3.3V peripheral domains. |
Applications
| Battery-Powered Sensor Interface | Voltage-Level Translation |
|---|---|
Use Scenario: A wearable health monitor reads analog sensor outputs digitized by a 1.8V ADC, but system MCU runs at 3.3V and requires clean enable pulses. IC Role / Device Role / Timing Role: Configured as non-inverting buffer with Schmitt inputs to condition noisy enable signals from low-power sensor hub before routing to 3.3V MCU GPIO. Use Value: Eliminates discrete resistor-divider + Schmitt buffer; maintains timing integrity with <4ns delay while consuming <1μA static current. |
Use Scenario: An IoT edge node uses a 1.2V FPGA core and 3.3V Wi-Fi module sharing control lines (e.g., RESET#, IRQ). IC Role / Device Role / Timing Role: Configured as 2-input NAND with one inverted input to translate 1.2V-active-low FPGA output to 3.3V-active-low Wi-Fi reset signal. Use Value: Achieves bidirectional voltage translation without direction pins or external biasing; IOFF prevents current flow when FPGA is powered off. |
| Power-Gated Peripheral Control | Configurable Logic in Space-Constrained Devices |
Use Scenario: A tablet's display backlight driver IC powers down during sleep, but host processor must retain ability to re-enable it without full system wake. IC Role / Device Role / Timing Role: Configured as OR gate with one input tied to always-on PMIC interrupt and another to sleep-mode GPIO; output drives backlight EN#. Use Value: Enables wake-from-sleep via external event (e.g., ambient light change) while drawing <1μA during deep sleep - no additional LDO or supervisor needed. |
Use Scenario: A wireless earbud PCB has <0.5mm² available for logic to debounce touchpad inputs and generate LED blink patterns. IC Role / Device Role / Timing Role: Configured as inverter + MUX to toggle LED polarity and select blink rate based on button hold duration. Use Value: Replaces two discrete logic ICs (74AUP1G04 + 74AUP1G157) in 1.0mm × 1.0mm footprint - saves 60% board area and reduces assembly cost. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar configurable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G98DRYR | Wider VCC range (1.65–5.5V); no Schmitt inputs; higher ICC (10μA); larger X2-SON4 (1.2×1.0mm). | Requires external hysteresis for noisy inputs; unsuitable for sub-1.65V operation or ultra-low-IQ designs. | Select when interfacing with 5V peripherals and Schmitt action is unnecessary. |
| 74AUP1G57GW,125 | Same AUP family, identical VCC range and IOFF; different pinout (SOT363); no DFN variants offered. | Larger 2.0×2.0mm footprint limits use in ultra-thin devices; same logic flexibility but less board-area efficient. | Select when SOT363 hand-solderability or legacy footprint compatibility is prioritized over miniaturization. |
Compared with SN74LVC1G98DRYR and 74AUP1G57GW,125, the 74AUP1G98FW4-7 uniquely combines sub-1V operation, Schmitt inputs, and 1.0mm² DFN packaging - making it the only choice for space- and power-constrained mixed-voltage systems requiring noise-immune configurability.
Availability
74AUP1G98FW4-7 is available at Aetrix Electronics and suitable for battery-powered wearables, portable medical sensors, and ultra-compact IoT edge nodes requiring stable component supply, long-term lifecycle support, and RoHS-compliant sourcing.
Supply support for 74AUP1G98FW4-7 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Diodes Incorporated is a global semiconductor company specializing in discrete, analog, and logic solutions for high-efficiency power management and signal integrity applications.
The 74AUP (Advanced Ultra Low-Power) logic family targets portable and energy-sensitive systems, delivering sub-1V operation, nanoamp quiescent current, and robust noise immunity - engineered specifically for battery longevity and mixed-voltage interoperability.
FAQ
What logic functions can the 74AUP1G98FW4-7 implement?
The device implements eight distinct logic functions determined by its three inputs (A, B, C): 2:1 multiplexer, AND, OR, NAND, NOR, inverter, and non-inverting buffer. The function table in DS36855 Rev. 1–2 (page 4) defines exact output states for each input combination - no external configuration pins or programming are required.
Does the 74AUP1G98FW4-7 require external pull-up or pull-down resistors?
No. All inputs are internally biased and Schmitt-triggered, eliminating need for external resistors. Unused inputs must be tied to VCC or GND per recommended operating conditions (DS36855 p.5, Note 8) to prevent floating states and excessive ICC. The output is push-pull and does not require termination.
How does IOFF protect the device during partial power-down?
When VCC = 0V, the IOFF circuit disables the output stage, limiting leakage current to ±0.6μA max across temperature. This prevents reverse current flow from powered I/O lines (e.g., 3.3V bus) into the unpowered VCC rail - avoiding damage, false logic states, or unintended power-up of downstream circuitry.
Can the 74AUP1G98FW4-7 interface between 1.2V and 3.3V domains?
Yes. Its inputs tolerate 0–3.6V regardless of VCC setting, and it operates down to 0.8V. When powered at 1.2V, it accepts 3.3V inputs safely; when powered at 3.3V, it drives 3.3V-compatible loads. This enables bidirectional level translation without external components - confirmed by VI absolute max rating (–0.5V to +4.6V) and recommended VI range (0–3.6V).
74AUP1G98FW4-7 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Diodes Incorporated
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Obsolete
- Logic Type:
- Configurable Multiple Function
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Schmitt Trigger Input:
- Yes
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- X2-DFN1010-6
74AUP1G98FW4-7 FAQ
1.How can I place an order for 74AUP1G98FW4-7 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G98FW4-7 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G98FW4-7 reliable?
The price and inventory of 74AUP1G98FW4-7 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G98FW4-7 is usually 5 days.
3.What payment methods are accepted for 74AUP1G98FW4-7?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G98FW4-7 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G98FW4-7?
74AUP1G98FW4-7 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G98FW4-7 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G98FW4-7?
For technical support, including 74AUP1G98FW4-7 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G98FW4-7 requirements.
6.How does Aetrix verify that 74AUP1G98FW4-7 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G98FW4-7 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G98FW4-7 meets industry standards.
7.What is the process for return or replacement of 74AUP1G98FW4-7?
All 74AUP1G98FW4-7 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G98FW4-7, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G98FW4-7 part is unused and in its original packaging.
Return procedure for 74AUP1G98FW4-7:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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