Nexperia USA Inc. 74AUP1G98GM,132

Overview

74AUP1G98GM,132 from Nexperia is a single-channel, low-power configurable multiple-function logic gate with Schmitt-trigger inputs, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer configurations via three input pins (A, B, C). It operates across 0.8 V to 3.6 V supply, delivers ≤1.4 μA max ICC at −40 °C to +125 °C, and features IOFF partial power-down protection. It is used in space-constrained industrial sensor interfaces requiring flexible logic reconfiguration without board redesign.

For engineers reviewing the 74AUP1G98GM,132 datasheet, 74AUP1G98GM,132 pinout, 74AUP1G98GM,132 application, or 74AUP1G98GM,132 equivalent, key selection criteria include its 6-terminal XSON6 (SOT886) package, Schmitt-trigger noise immunity, sub-1 μA static current at 1.2 V, and guaranteed operation up to +125 °C ambient - critical for automotive body control modules and battery-powered IoT edge nodes.

Technical Context

The device implements a programmable 3-input logic cell where A, B, and C collectively determine output Y's Boolean function per Table 4 and Table 5. Its Schmitt-trigger inputs provide ≥0.07 V hysteresis (up to 1.31 V at 3.0 V VCC), enabling robust noise rejection on slow or noisy control lines. All inputs tolerate overvoltage up to 3.6 V independent of VCC.

IOFF circuitry actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA max, satisfying partial power-down requirements in multi-rail systems. Propagation delay ranges from 1.6 ns (VCC = 3.0 V, CL = 5 pF) to 22.4 ns (VCC = 1.1 V, CL = 30 pF), scaling predictably with supply and load capacitance.

Key Specifications

Pinout & Package

XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body dimensions 1.0 mm × 1.45 mm × 0.5 mm; thermal pad optional; pin 1 index located at lower-left corner below marking code "a9".

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar configurable logic gate applications.

Compared with SN74LVC1G98DRYR and 74LVC1G57GW,125, the 74AUP1G98GM,132 uniquely combines sub-μA static power, Schmitt-trigger noise rejection, IOFF protection, and the smallest XSON6 footprint - making it optimal for battery-critical, space-constrained, and multi-rail industrial designs.

Availability

74AUP1G98GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control units, IoT edge node wake-up circuits, and medical diagnostic handhelds requiring stable component supply across extended temperature and low-power operating conditions.

Supply support for 74AUP1G98GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a global semiconductor expert delivering high-performance logic, discrete, and MOSFET solutions optimized for efficiency, reliability, and miniaturization in high-volume applications.

The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and thermally constrained systems where nanowatt static power, wide VCC scalability, and robust noise immunity are mandatory design requirements.

FAQ

Can the 74AUP1G98GM,132 be used with a 0.9 V supply?

Yes - the device is fully specified from 0.8 V to 3.6 V. At 0.9 V, propagation delay increases to ~13.2 ns (CL = 5 pF), VOH remains ≥0.7×VCC (≥0.63 V), and ICC stays ≤0.9 μA. This enables direct integration with sub-1 V energy-harvesting PMIC outputs.

Does the IOFF feature require external pull-up/down resistors?

No - IOFF is internal and automatic. When VCC = 0 V, the output Y is placed in high-impedance state regardless of input states (A/B/C), eliminating need for external resistors. Output leakage remains ≤±0.75 μA, preventing bus contention.

How is logic function selected on the 74AUP1G98GM,132?

Function selection is hardwired via DC levels on pins A, B, and C per Table 4 and Table 5. For example, tying A=H, B=L, C=L configures the device as an inverter (Y = NOT A); no clock, programming interface, or configuration register is involved - it is purely combinational.

Is the XSON6 (SOT886) package compatible with standard reflow profiles?

Yes - SOT886 complies with JEDEC J-STD-020 moisture sensitivity level 1 (MSL1) and supports standard lead-free reflow (peak 260 °C, 10 s). Its 0.5 mm height and 0.4 mm terminal pitch are compatible with automated optical inspection (AOI) and X-ray void detection.