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Nexperia USA Inc. 74AUP1G98GW,125
- Part No.:
- 74AUP1G98GW,125
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-TSSOP, SC-88, SOT-363
- Datasheet:
-
74AUP1G98GW,125.pdf
- Description:
- IC CONFIG MULTIPLE FUNCT 6TSSOP
- Quantity:
- Payment:
- Shipping:
Inventory:1,244
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Product details
Overview
74AUP1G98GW,125 from Nexperia is a single-channel, low-power configurable multiple-function logic gate with Schmitt-trigger inputs, supporting MUX, AND, OR, NAND, NOR, inverter, and buffer configurations via its 3-bit input control (A/B/C). It operates across 0.8 V to 3.6 V supply, delivers ≤0.9 μA max ICC at 125 °C, and features IOFF circuitry for partial power-down protection. It is used in battery-powered sensor interfaces and I/O expansion circuits where voltage-level flexibility and ultra-low static power are critical.
For engineers reviewing the 74AUP1G98GW,125 datasheet, 74AUP1G98GW,125 pinout, 74AUP1G98GW,125 application, or 74AUP1G98GW,125 equivalent, key selection criteria include its 6-pin TSSOP6 package, Schmitt-trigger noise immunity, guaranteed operation up to +125 °C, and compatibility with mixed-voltage logic domains in portable and industrial control systems.
Technical Context
The device implements a programmable logic cell using three data inputs (A, B, C) to select one of seven standard logic functions via internal configuration mapping - no external programming interface is required. Its Schmitt-trigger inputs provide hysteresis (VH = 0.07–1.31 V depending on VCC), enabling robust noise rejection in noisy environments such as motor control feedback paths or industrial sensor nodes.
IOFF circuitry actively disables outputs when VCC = 0 V, limiting backflow current to ±0.75 μA maximum and supporting hot-insertion and partial system power-down. Input tolerance to 3.6 V allows interfacing with higher-voltage peripherals even when powered at 0.8 V, simplifying level-shifting in multi-rail embedded designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Supply Voltage Range | 0.8 V to 3.6 V - enables direct interface with 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains without level shifters. |
| Max ICC (Tamb = −40 °C to +125 °C) | 1.4 μA - ensures <1.5 μW static power at 1.8 V, critical for always-on IoT edge nodes. |
| Propagation Delay (VCC = 3.0 V, CL = 5 pF) | 1.6–4.4 ns - supports >100 MHz toggle rates in high-speed control signal routing. |
| Input Hysteresis (VH) | 0.07–1.31 V - rejects noise spikes up to 1.3 V peak-to-peak without false triggering. |
| IOFF Leakage (VCC = 0 V) | ±0.75 μA - prevents damaging back-current during board-level power sequencing or sleep mode. |
| Operating Temperature | −40 °C to +125 °C - qualified for under-hood automotive, industrial PLC, and outdoor equipment use. |
| ESD Protection | HBM >5000 V, CDM >1000 V - reduces field failure risk in manual handling and automated assembly. |
Pinout & Package
TSSOP6 plastic thin shrink small outline package (SOT363-2), 6-lead, body width 1.25 mm, 0.65 mm pitch, exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (B) | Data input | One of three configurable logic inputs; accepts 0.8–3.6 V signals regardless of VCC level. |
| 2 (GND) | Ground reference | 0 V return path for all internal logic and output drivers; must be low-impedance for noise immunity. |
| 3 (A) | Data input | Primary logic input; tied to VCC or GND to set function mode per truth table (Table 4). |
| 4 (Y) | Configurable output | Single-ended CMOS output capable of driving 4 mA at 3.0 V; supports fan-out of ≥10 74AUP loads. |
| 5 (VCC) | Supply voltage | Power rail for core logic and output stage; decoupling capacitor (100 nF) required within 5 mm. |
| 6 (C) | Data input | Third logic input; combined with A and B determines function (e.g., C=H/B=L/A=L → inverter). |
Key Features
| Feature | Design Value |
|---|---|
| Schmitt-trigger inputs | Enables reliable switching in slow-rising or noisy signals (e.g., mechanical switch debouncing, analog sensor thresholds). |
| IOFF partial power-down | Prevents reverse current flow when VCC is off, eliminating need for external isolation diodes in modular systems. |
| Overvoltage-tolerant inputs | Accepts up to 3.6 V inputs while operating at 0.8 V, enabling seamless integration into mixed-supply FPGA or MCU I/O banks. |
| JEDEC-compliant voltage ranges | Validated across five JEDEC standards (JESD8-12 through JESD8-C), ensuring interoperability in legacy and next-gen designs. |
| Ultra-low dynamic power | CPD = 2.7–4.4 pF enables sub-μW dynamic dissipation at 1 MHz, extending battery life in wearables and remote sensors. |
Applications
| Industrial Sensor Interface | Portable Device I/O Expansion |
|---|---|
|
Use Scenario: Signal conditioning and logic-level translation between 3.3 V microcontroller GPIO and 1.8 V environmental sensor outputs. IC Role / Device Role / Timing Role: Configured as a buffer with Schmitt-trigger input to reject EMI-induced glitches on long PCB traces. Use Value: Eliminates need for discrete RC filters and dual-supply level shifters, reducing BOM count by two components per channel. |
Use Scenario: Enabling/disabling peripheral modules (e.g., Bluetooth radio, display backlight) based on system power state. IC Role / Device Role / Timing Role: Used as an AND gate with one inverted input to generate controlled enable pulses synchronized to sleep/wake transitions. Use Value: IOFF functionality ensures zero leakage current during deep-sleep mode, extending coin-cell battery life beyond 5 years. |
| Automotive Body Control | Programmable Logic Subsystem |
|
Use Scenario: Debouncing door latch switch signals before feeding to CAN controller interrupt inputs. IC Role / Device Role / Timing Role: Configured as an inverter with Schmitt-trigger input to clean mechanical contact bounce (2–10 ms duration). Use Value: Guarantees clean edge generation over full −40 °C to +125 °C range without software polling or timer-based firmware debounce. |
Use Scenario: Replacing fixed-function gates in FPGA companion logic for prototyping or low-volume production. IC Role / Device Role / Timing Role: Set as 2-input MUX with inverted output to route alternate control signals based on configuration strap pins. Use Value: Reduces design iteration time by allowing hardware logic reconfiguration without PCB respin or FPGA recompilation. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar configurable logic gate applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G98DBVR | Higher ICC (max 10 μA at 125 °C); no IOFF; 1.65–5.5 V supply range. | Lacks partial power-down capability; unsuitable for hot-swap or multi-rail sleep architectures. | Select only if system operates exclusively above 1.65 V and IOFF is unnecessary. |
| 74LVC1G57GW,125 | Same pinout and function set; higher propagation delay (min 3.2 ns @ 3.3 V); identical IOFF and hysteresis. | Marginally slower timing; otherwise drop-in compatible in most non-critical timing paths. | Choose when cost sensitivity outweighs 1.2 ns speed advantage and 0.5 μA ICC reduction. |
Compared with SN74LVC1G98DBVR and 74LVC1G57GW,125, the 74AUP1G98GW,125 offers the lowest static power and strongest noise immunity across the widest voltage range, making it optimal for energy-constrained and electrically harsh environments.
Availability
74AUP1G98GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, portable device I/O expansion, and automotive body control applications requiring stable component supply and long-term lifecycle support.
Supply support for 74AUP1G98GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on essential efficiency technologies, delivering high-performance logic, analog, and MOSFET solutions optimized for reliability and energy efficiency.
The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and thermally constrained applications, emphasizing sub-μA static current, wide-VCC operation, and robustness in real-world electrical environments.
FAQ
What logic functions can the 74AUP1G98GW,125 implement?
The device supports seven logic functions - MUX, AND, OR, NAND, NOR, inverter, and buffer - selected solely by hardwiring its A, B, and C inputs to VCC or GND per Table 4 in the datasheet. No clock, programming interface, or external memory is needed; configuration is static and determined at power-up.
Does the 74AUP1G98GW,125 require external pull-up or pull-down resistors?
No. All inputs tolerate direct connection to VCC or GND without external biasing. The Schmitt-trigger inputs have defined VT+ and VT− thresholds (e.g., 0.88–1.24 V for VT− at 3.0 V VCC), eliminating floating-input risk and enabling direct strap-based configuration.
How does IOFF protect the device during partial power-down?
When VCC = 0 V, the IOFF circuit disables the output driver and isolates Y from internal logic, limiting leakage current to ±0.75 μA maximum. This prevents backflow from powered downstream circuits (e.g., 3.3 V bus) into the unpowered IC, avoiding latch-up or damage during staged power sequencing.
Can the 74AUP1G98GW,125 drive a 50 pF load reliably?
Yes. At VCC = 3.0 V and CL = 30 pF, tpd remains ≤7.5 ns (−40 °C to +125 °C), confirming stable operation well beyond 50 pF with appropriate layout (short traces, ground plane). For CL >30 pF, verify timing margins using CPD = 4.4 pF and PD = CPD × VCC² × fi × N formula.
74AUP1G98GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-TSSOP, SC-88, SOT-363
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Configurable Multiple Function
- Number of Circuits:
- 1
- Number of Inputs:
- 3
- Schmitt Trigger Input:
- Yes
- Output Type:
- Single-Ended
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 0.8V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP
74AUP1G98GW,125 FAQ
1.How can I place an order for 74AUP1G98GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1G98GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1G98GW,125 reliable?
The price and inventory of 74AUP1G98GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1G98GW,125 is usually 5 days.
3.What payment methods are accepted for 74AUP1G98GW,125?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1G98GW,125 transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1G98GW,125?
74AUP1G98GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1G98GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1G98GW,125?
For technical support, including 74AUP1G98GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1G98GW,125 requirements.
6.How does Aetrix verify that 74AUP1G98GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1G98GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1G98GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1G98GW,125?
All 74AUP1G98GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1G98GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1G98GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1G98GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP1G98GW,125 Tags
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74LVC1G57GW,125
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74LVC1G97GV,125
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