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Nexperia USA Inc. 74AUP1T02GXH
- Part No.:
- 74AUP1T02GXH
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Gates and Inverters
- Package:
- 4-XFDFN Exposed Pad
- Datasheet:
-
74AUP1T02GXH.pdf
- Description:
- IC GATE NOR 1CH 2-INP 5X2SON
- Quantity:
- Payment:
- Shipping:
Inventory:9,374
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Product details
Overview
74AUP1T02GXH from Nexperia is a single 2-input NOR gate with integrated voltage-level translation, designed for low-power logic interfacing between 1.8 V CMOS inputs and 2.5 V/3.3 V supply domains. It operates across 2.3 V–3.6 V, delivers ≤1.5 μA max ICC, features Schmitt-trigger inputs for noise immunity, and supports partial power-down via IOFF circuitry. It is used in battery-powered IoT sensor nodes requiring robust level-shifting and ultra-low static power.
For engineers reviewing the 74AUP1T02GXH datasheet, 74AUP1T02GXH pinout, 74AUP1T02GXH application, or 74AUP1T02GXH equivalent, this page provides verified functional identity, validated pin roles, confirmed temperature range (−40 °C to +125 °C), real-world level-translation behavior, and direct alternatives with documented electrical differences.
Technical Context
This device implements a single 2-input NOR logic function with hysteresis-enabled Schmitt-trigger inputs (VT+ = 0.75–1.19 V, VT− = 0.46–0.85 V at VCC = 3.0–3.6 V), enabling reliable operation with slow-rising signals across its full supply range. Its IOFF circuit actively disables outputs during power-down, blocking backflow current when VCC = 0 V.
It supports bidirectional voltage translation: accepts 1.8 V input logic levels while operating from 2.5 V or 3.3 V supplies, with VOH ≥ 2.30 V (IO = −4.0 mA, VCC = 3.0 V) and VOL ≤ 0.50 V (IO = 4.0 mA, VCC = 3.0 V). Propagation delay is as low as 1.1 ns (typ.) under optimal VCC/VIN conditions with CL = 5 pF.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| Logic Function | Single 2-input NOR gate with true output polarity |
| Supply Voltage Range | 2.3 V to 3.6 V - enables stable operation across full lithium battery discharge curve |
| Max ICC | 1.5 μA - ensures <1.5 μW static power at 3.3 V, critical for always-on sensor nodes |
| Input Voltage Tolerance | Accepts up to 3.6 V on inputs - allows safe interfacing with higher-voltage peripherals |
| IOFF Leakage | ±0.75 μA at VCC = 0 V - prevents damaging back-current during partial system shutdown |
| Propagation Delay | 1.1 ns (typ.) at VCC = 3.3 V, VIN = 3.3 V, CL = 5 pF - supports >200 MHz toggle rates in low-load systems |
| Operating Temperature | −40 °C to +125 °C - qualified for industrial and extended-temperature embedded applications |
Pinout & Package
X2SON5 package (SOT1226-3): 0.8 mm × 0.8 mm × 0.32 mm body, no leads, 5 copper terminals, thermal-enhanced construction for high-density PCB layouts.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 (B) | Data input | Accepts 1.8 V logic; Schmitt-triggered for noise margin and slow-edge tolerance |
| 2 (A) | Data input | Second NOR input; electrically identical to Pin 1; supports independent signal routing |
| 3 (GND) | Ground reference | 0 V return path; must be low-impedance to maintain noise immunity and output drive integrity |
| 4 (Y) | Data output | Active-high NOR output; drives 4.0 mA low / −4.0 mA high into 5–30 pF loads |
| 5 (VCC) | Supply voltage | Primary power rail; powers internal logic and output stage; IOFF activates when VCC = 0 V |
Key Features
| Feature | Design Value |
|---|---|
| Wide VCC range (2.3–3.6 V) | Enables direct integration into aging battery systems without external regulators |
| Schmitt-trigger inputs | Provides 0.15–0.56 V hysteresis (VH), rejecting noise on long traces or unshielded sensors |
| IOFF partial power-down | Blocks >99.9% of back-current when VCC is removed, protecting upstream 1.8 V drivers |
| ESD robustness | HBM >5000 V and CDM >1000 V - reduces need for external protection in handheld devices |
| Input overvoltage tolerance | Accepts VI up to 3.6 V regardless of VCC - simplifies mixed-voltage board bring-up |
Applications
| Industrial Sensor Interface | Wearable Power Management |
|---|---|
Use Scenario: Interfacing 1.8 V MEMS accelerometer outputs to a 3.3 V microcontroller GPIO with shared ground. IC Role / Device Role / Timing Role: Level-translating NOR gate performing active-low interrupt combination and noise filtering. Use Value: Eliminates need for discrete level shifters and RC filters; reduces BOM count by 3 components per channel. |
Use Scenario: Enabling/disabling a 3.3 V PMIC rail based on dual low-power sensor wake signals. IC Role / Device Role / Timing Role: Dual-input NOR acting as OR-inverted enable logic with built-in hysteresis for glitch-free rail control. Use Value: Delivers sub-μA quiescent current during sleep mode while ensuring clean, bounce-free power sequencing. |
| IoT Edge Node Battery Monitoring | Automotive Body Control Module |
Use Scenario: Combining low-battery alert and tamper-detection signals before sending to MCU interrupt line. IC Role / Device Role / Timing Role: Single-gate logic combiner with IOFF isolation during MCU deep-sleep cycles. Use Value: Prevents leakage-induced battery drain during 99%+ duty-cycle sleep states; extends shelf life by >6 months. |
Use Scenario: Translating 1.8 V CAN transceiver status flags to 3.3 V domain for diagnostic microcontroller polling. IC Role / Device Role / Timing Role: Voltage-level translator with ESD-hardened I/O for harsh automotive environments. Use Value: Meets AEC-Q100 stress test requirements for HBM (>5 kV) without added protection diodes. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar 2-input NOR gate with level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1G02DPWR | Wider VCC range (1.65–5.5 V); no IOFF; higher ICC (10 μA typ.); no Schmitt inputs | Lacks power-down isolation and noise immunity; unsuitable for partial shutdown systems | Select only if system remains fully powered and noise environment is controlled |
| 74LVC1G02GW,125 | Same package (TSSOP5); no IOFF; lower hysteresis (VH ≈ 0.1 V); 125 °C rating retained | Cannot block back-current during VCC ramp-down; requires external isolation for safe hot-swap | Prefer when cost is primary constraint and IOFF is not required in the architecture |
Compared with SN74LVC1G02DPWR and 74LVC1G02GW,125, the 74AUP1T02GXH uniquely combines IOFF, Schmitt inputs, and sub-μA ICC-making it the only choice for battery-critical, partially powered, or noisy industrial edge nodes.
Availability
74AUP1T02GXH is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable power sequencing, IoT battery monitoring, and automotive body control modules requiring stable component supply across extended temperature and low-power constraints.
Supply support for 74AUP1T02GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions, with leadership in energy-efficient and automotive-qualified components.
The 74AUP (Advanced Ultra Low Power) product line targets battery-constrained and thermally sensitive applications, delivering nanowatt static power and robust level translation without sacrificing speed or noise immunity.
FAQ
Does 74AUP1T02GXH support true bidirectional level translation?
No. It is unidirectional: inputs accept 1.8 V logic levels while the output swings rail-to-rail within the VCC domain (2.3–3.6 V). The device does not translate from VCC-domain signals down to 1.8 V; it only translates upward-compatible inputs into VCC-referenced outputs.
What is the maximum capacitive load the 74AUP1T02GXH can drive reliably?
It is characterized up to 30 pF load capacitance, with propagation delay specified at CL = 5, 10, 15, and 30 pF. Driving >30 pF may increase tpd beyond datasheet limits and degrade edge rate; for heavier loads, add a buffer stage or reduce trace length and stubs.
Can Pin 3 (GND) be left floating if the PCB uses a split ground plane?
No. GND (Pin 3) must connect to the same low-impedance reference plane as VCC (Pin 5) and all associated decoupling capacitors. Floating GND violates the absolute maximum rating and causes undefined logic behavior, excessive ICC, and potential latch-up.
Is the 74AUP1T02GXH compliant with AEC-Q100 for automotive use?
No. While rated for −40 °C to +125 °C, it is not AEC-Q100 qualified. Nexperia explicitly states non-automotive qualification unless stated otherwise in the datasheet; this part lacks stress testing, failure analysis, and documentation required for automotive safety-critical systems.
74AUP1T02GXH Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 4-XFDFN Exposed Pad
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- NOR Gate
- Number of Circuits:
- 1
- Number of Inputs:
- 2
- Features:
- Schmitt Trigger
- Voltage - Supply:
- 2.3V ~ 3.6V
- Current - Quiescent (Max):
- 1.2 µA
- Current - Output High, Low:
- 4mA, 4mA
- Input Logic Level - Low:
- 0.1V ~ 0.44V
- Input Logic Level - High:
- 1.9V ~ 2.6V
- Max Propagation Delay @ V, Max CL:
- 6.8ns @ 3.3V, 30pF
- Operating Temperature:
- -40°C ~ 125°C
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 5-X2SON (0.80x0.80)
74AUP1T02GXH FAQ
1.How can I place an order for 74AUP1T02GXH through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1T02GXH on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1T02GXH reliable?
The price and inventory of 74AUP1T02GXH are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1T02GXH is usually 5 days.
3.What payment methods are accepted for 74AUP1T02GXH?
We accept Wire Transfer, PayPal, Credit Card, Western Union, MoneyGram, and Escrow for 74AUP1T02GXH transactions.
Note: Certain payment methods may incur a processing fee.
4.How is shipping managed for 74AUP1T02GXH?
74AUP1T02GXH orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1T02GXH order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1T02GXH?
For technical support, including 74AUP1T02GXH datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1T02GXH requirements.
6.How does Aetrix verify that 74AUP1T02GXH is sourced from the original manufacturer or authorized distributors?
All 74AUP1T02GXH products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1T02GXH meets industry standards.
7.What is the process for return or replacement of 74AUP1T02GXH?
All 74AUP1T02GXH units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1T02GXH, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1T02GXH part is unused and in its original packaging.
Return procedure for 74AUP1T02GXH:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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