Nexperia USA Inc. 74AUP1T14GXH

Overview

74AUP1T14GXH from Nexperia is a single-channel low-power inverting voltage-level translator with Schmitt-trigger inputs, designed for bidirectional logic-level translation between 1.8 V and 3.3 V domains while operating from a single 2.3 V–3.6 V supply. It features IOFF partial power-down protection, ±0.75 μA max input leakage at −40 °C to +125 °C, and 0.10–0.56 V hysteresis for noise immunity in battery-powered sensor interfaces.

For engineers reviewing the 74AUP1T14GXH datasheet, 74AUP1T14GXH pinout, 74AUP1T14GXH application, or 74AUP1T14GXH equivalent, this device supports robust level-shifting in portable IoT nodes, wearables with mixed-voltage peripherals, and industrial edge sensors requiring ultra-low static current and guaranteed operation down to 2.3 V supply.

Technical Context

The 74AUP1T14GXH implements a single inverting gate with Schmitt-trigger inputs enabling tolerance to slow-rising signals across its full 2.3 V–3.6 V VCC range. Its IOFF circuit actively disables outputs during power-down to prevent backflow current, satisfying partial-power-down requirements in multi-rail systems.

Input thresholds (VT+ = 0.75–1.19 V, VT− = 0.46–0.85 V) and hysteresis (VH = 0.15–0.56 V) are specified over −40 °C to +125 °C, ensuring reliable switching in thermally variable environments. Propagation delay ranges from 1.0 ns (typical, 3.3 V, 5 pF load) to 11.9 ns (max, 2.3 V, 30 pF load), supporting both high-speed and ultra-low-power timing paths.

Key Specifications

Pinout & Package

X2SON5 package (SOT1226-3): 0.8 mm × 0.8 mm × 0.32 mm, thermal-enhanced, leadless, 5-terminal surface-mount package with exposed die pad for improved heat dissipation in space-constrained designs.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar inverting level translation applications.

Compared with SN74LVC1G04DSFR and 74LVC1G14GW,125, the 74AUP1T14GXH uniquely combines ultra-low ICC (<3.5 μA), guaranteed IOFF, and Schmitt-trigger noise immunity in the X2SON5 footprint-making it the sole choice for long-life, hot-pluggable, or thermally aggressive embedded applications.

Availability

74AUP1T14GXH is available at Aetrix Electronics and suitable for industrial sensor interfaces, wearable biometric hubs, IoT edge node power sequencing, and automated test equipment signal conditioning requiring stable component supply across extended temperature and low-power constraints.

Supply support for 74AUP1T14GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading Dutch semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components for automotive, industrial, and consumer markets.

The 74AUP1T14GXH belongs to the Advanced Ultra-low Power (AUP) logic family, engineered specifically for battery-operated and thermally constrained applications demanding sub-microwatt static power and robust level translation.

FAQ

What is the maximum capacitive load the 74AUP1T14GXH can drive while maintaining timing specifications?

The 74AUP1T14GXH is characterized up to 30 pF load capacitance across its full operating range. At VCC = 2.3 V and Tamb = −40 °C to +125 °C, tpd remains ≤11.9 ns with CL = 30 pF. Driving >30 pF may increase propagation delay beyond specification and degrade edge rate; external series termination or buffer staging is recommended for heavier loads.

Can the 74AUP1T14GXH safely interface a 3.3 V microcontroller GPIO to a 1.8 V sensor's interrupt pin?

Yes - the 74AUP1T14GXH accepts input voltages up to 3.6 V while operating from 2.3–3.6 V, allowing direct connection of a 3.3 V GPIO to pin A. Its Schmitt-trigger input ensures clean inversion even with slow-rising interrupt edges, and the inverted Y output delivers valid 1.8 V–compatible logic levels to the sensor's 1.8 V-tolerant input.

Does the n.c. pin (pin 1) require any PCB layout consideration?

No - pin 1 is internally not connected and has no electrical function. It may be left unconnected on the PCB; no copper pour, solder mask opening, or thermal relief is needed. The pin 1 indicator is located below the marking code in the lower-left corner, aiding visual orientation during placement.

How does the IOFF feature behave when VCC is ramping during power-up or power-down sequences?

IOFF activates automatically when VCC falls below ~0.2 V, disabling the output to prevent back-current. During power-up, the output remains in high-impedance until VCC exceeds ~0.8 V, then transitions to active operation. This behavior is verified across −40 °C to +125 °C and ensures safe hot-insertion in modular systems with staggered rail sequencing.