Nexperia USA Inc. 74AUP1T34GM,132
- Part No.:
- 74AUP1T34GM,132
- Manufacturer:
- Nexperia USA Inc.
- Package:
- 6-XFDFN
- Datasheet:
-
74AUP1T34GM,132.pdf
- Description:
- IC TRANSLTR UNIDIRECTIONAL 6XSON
- Quantity:
- Payment:

- Shipping:

Inventory:3,459
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Product details
Overview
74AUP1T34GM,132 from Nexperia is a single-channel dual-supply level-translating buffer with independent VCC(A) and VCC(Y) rails (1.1 V to 3.6 V each), Schmitt-trigger inputs for noise immunity, IOFF-enabled partial power-down protection, and guaranteed operation from –40 °C to +125 °C in the XSON6 (SOT886) package. It enables voltage translation between disparate logic domains in ultra-low-power IoT sensors and battery-powered microcontroller peripherals.
For engineers reviewing the 74AUP1T34GM,132 datasheet, 74AUP1T34GM,132 pinout, 74AUP1T34GM,132 application, or 74AUP1T34GM,132 equivalent, this device is selected for its sub-1 µA static ICC, dual-rail flexibility, IOFF backflow prevention, and validated performance across industrial temperature extremes - critical when interfacing 1.2 V I²C peripherals with 3.3 V host controllers.
Technical Context
The 74AUP1T34GM implements a non-inverting buffer with input referenced to VCC(A) and output referenced to VCC(Y), enabling bidirectional voltage translation without external components. Its Schmitt-trigger input threshold scales with VCC(A), ensuring robust switching despite slow-rising signals or high-impedance source conditions.
IOFF circuitry actively disables the output stage when either supply is near 0 V, limiting off-state leakage to ±0.75 µA and preventing destructive current flow during mixed-voltage power sequencing - a requirement in modern multi-rail embedded systems with staggered power-up.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC Range (A/Y) | 1.1 V to 3.6 V per rail - supports translation between 1.2 V, 1.8 V, 2.5 V, and 3.3 V logic domains |
| ICC (max) | 1.4 µA at +125 °C - enables always-on sensor interface nodes with multi-year battery life |
| IOFF Leakage | ±0.75 µA - prevents backfeed current during partial power-down of host MCU or peripheral |
| tpd (typ) | 3.1 ns at VCC(A)=3.3 V, VCC(Y)=3.3 V, CL=5 pF - sufficient for I²C, SPI, and GPIO signal routing |
| Operating Temp | –40 °C to +125 °C - qualified for under-hood automotive, industrial motor control, and outdoor edge devices |
| ESD Rating | HBM >5000 V, CDM >1000 V - withstands handling and board-level ESD events without protection diodes |
| Input Threshold | VIH = 2.0 V min at VCC(A)=3.0–3.6 V; VIL = 0.9 V max - ensures clean logic recognition across full VCC range |
Pinout & Package
XSON6 plastic extremely thin small outline package (SOT886); no leads; 6 terminals; body size 1.0 × 1.45 × 0.5 mm; wettable flanks not present; thermal pad absent.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| A | Data input | Single logic input referenced to VCC(A); accepts 0–3.6 V with Schmitt-trigger hysteresis |
| VCC(A) | Input-side supply | Powers input stage and defines VIH/VIL thresholds; decoupling required within 1 cm |
| GND | Ground reference | Common return for both supply rails; must be low-impedance and shared with system ground plane |
| n.c. | No-connect terminal | Internally unconnected; left floating - no PCB trace or solder mask opening needed |
| VCC(Y) | Output-side supply | Powers output driver and sets VOH/VOL levels; independent of VCC(A) for true level shifting |
| Y | Data output | Non-inverting buffered output referenced to VCC(Y); drives loads up to ±20 mA |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supplies | VCC(A) and VCC(Y) operate independently from 1.1 V to 3.6 V - eliminates need for external level shifters in mixed-voltage SoC interfaces |
| IOFF partial power-down | Output disabled with <±0.75 µA leakage when either VCC is 0 V - prevents bus contention during MCU sleep or hot-swap events |
| Schmitt-trigger input | Hysteresis ≥0.3×VCC(A) - rejects noise on long traces or high-impedance sensor outputs without external RC filtering |
| Ultra-low ICC | Max 1.4 µA at +125 °C - reduces system quiescent power by >90% vs. standard AUP buffers in always-on monitoring circuits |
| Industrial temp grade | Specified from –40 °C to +125 °C - supports deployment in engine control units, smart meters, and factory automation without derating |
Applications
| Industrial Sensor Interface | Low-Power MCU Peripherals |
|---|---|
Use Scenario: Interfacing a 1.2 V MEMS accelerometer to a 3.3 V ARM Cortex-M4 host MCU in a predictive maintenance node. IC Role / Device Role: Level-translating buffer isolating supply domains while preserving signal integrity and timing margins. Use Value: Eliminates discrete FET-based translators, reduces BOM count by one component, and maintains <5 ns propagation delay at 3.3 V output drive. | Use Scenario: Connecting a 1.8 V I²C EEPROM to a 3.0 V microcontroller in a battery-powered asset tracker. IC Role / Device Role: Bidirectional voltage translator enabling open-drain I²C communication across mismatched rails. Use Value: IOFF prevents back-current into the powered-down EEPROM during MCU deep-sleep, extending battery life beyond 5 years. |
| Automotive Body Control | Medical Wearable Data Acquisition |
Use Scenario: Translating signals between a 2.5 V CAN transceiver PHY and a 3.3 V body controller MCU in an interior lighting module. IC Role / Device Role: Unidirectional buffer providing rail isolation and noise margin for low-speed control signals. Use Value: Schmitt-trigger input rejects EMI from adjacent PWM-driven LED drivers, reducing firmware debounce overhead. | Use Scenario: Isolating a 1.1 V analog front-end ADC from a 1.8 V Bluetooth LE SoC in a continuous glucose monitor. IC Role / Device Role: Low-noise, low-leakage digital interface buffer enabling precise timing-critical data handoff. Use Value: Sub-1 µA ICC and <10% VCC overshoot/undershoot preserve signal fidelity and minimize RF coupling into sensitive analog sections. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar level-translating buffer applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1T34DBVR | Single-supply only (1.65–5.5 V); no dual-rail translation; higher ICC (10 µA typ) | Cannot translate between dissimilar rails (e.g., 1.2 V → 3.3 V); lacks IOFF | Select only when both sides share same VCC and partial power-down is unnecessary |
| TXB0101DCKR | Auto-direction sensing; higher propagation delay (12 ns typ); larger X2SON6 package (1.45 × 1.0 mm) | Supports bidirectional data but adds complexity for unidirectional use cases; requires external enable control | Prefer only for true bidirectional protocols like I²C; overkill for simple GPIO translation |
Compared with SN74LVC1T34DBVR and TXB0101DCKR, the 74AUP1T34GM,132 uniquely delivers true dual-rail translation with sub-1.5 µA ICC and guaranteed IOFF behavior - making it optimal for space-constrained, ultra-low-power unidirectional interfaces where supply independence and leakage control are mandatory.
Availability
74AUP1T34GM,132 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body electronics, medical wearable data acquisition, and low-power MCU peripheral interconnect requiring stable component supply across extended temperature ranges.
Supply support for 74AUP1T34GM,132 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert delivering high-performance, reliable, and efficient logic, discrete, and MOSFET solutions with leadership in process technology and application-specific design.
The 74AUP1T34 belongs to Nexperia's Advanced Ultra-low Power (AUP) logic family, engineered specifically for energy-sensitive applications demanding rail-to-rail voltage translation, minimal static power, and robust operation in harsh thermal environments.
FAQ
Can 74AUP1T34GM,132 translate from 3.3 V to 1.2 V?
No - the 74AUP1T34GM,132 is unidirectional: input A is referenced to VCC(A), output Y to VCC(Y). To translate 3.3 V logic down to 1.2 V, VCC(A) must be 3.3 V and VCC(Y) set to 1.2 V. The device does not support reverse-direction translation or automatic direction sensing.
Is the n.c. pin on SOT886 required to be grounded or left floating?
The n.c. (no-connect) pin on the SOT886 package is internally unconnected and must be left floating - no PCB trace, solder mask opening, or grounding is permitted. Connecting it risks internal shorting or undefined behavior per Nexperia's package specification.
Does the IOFF feature activate automatically when VCC(A) or VCC(Y) drops below a threshold?
Yes - IOFF activates whenever either VCC(A) or VCC(Y) falls below approximately 0.2 V, disabling the output driver and limiting leakage to ±0.75 µA. This occurs without external control signals and is inherent to the silicon design, ensuring fail-safe behavior during power sequencing.
What is the maximum capacitive load the Y output can drive reliably?
The Y output is characterized up to 30 pF load capacitance with guaranteed tpd and VOH/VOL performance across all VCC combinations and temperatures. Driving >30 pF may increase propagation delay nonlinearly and degrade noise margins; for heavier loads, add series termination or consider a buffer with higher drive strength.
74AUP1T34GM,132 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- 6-XFDFN
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Logic Type:
- Buffer, Non-Inverting
- Number of Elements:
- 1
- Number of Bits per Element:
- 1
- Input Type:
- -
- Output Type:
- Push-Pull
- Current - Output High, Low:
- 4mA, 4mA
- Voltage - Supply:
- 1.1V ~ 3.6V
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-XSON, SOT886 (1.45x1)
74AUP1T34GM,132 FAQ
1.How can I place an order for 74AUP1T34GM,132 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1T34GM,132 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1T34GM,132 reliable?
The price and inventory of 74AUP1T34GM,132 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1T34GM,132 is usually 5 days.
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4.How is shipping managed for 74AUP1T34GM,132?
74AUP1T34GM,132 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1T34GM,132 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1T34GM,132?
For technical support, including 74AUP1T34GM,132 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1T34GM,132 requirements.
6.How does Aetrix verify that 74AUP1T34GM,132 is sourced from the original manufacturer or authorized distributors?
All 74AUP1T34GM,132 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1T34GM,132 meets industry standards.
7.What is the process for return or replacement of 74AUP1T34GM,132?
All 74AUP1T34GM,132 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1T34GM,132, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1T34GM,132 part is unused and in its original packaging.
Return procedure for 74AUP1T34GM,132:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
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