Nexperia USA Inc. 74AUP1T45GW,125
- Part No.:
- 74AUP1T45GW,125
- Manufacturer:
- Nexperia USA Inc.
- Category:
- Translators, Level Shifters
- Package:
- Datasheet:
-
74AUP1T45GW,125.pdf
- Description:
- IC TXRX NON-INVERT 3.6V 6TSSOP
- Quantity:
- Payment:

- Shipping:

Inventory:8,077
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Product details
Overview
74AUP1T45GW,125 from Nexperia is a single-bit dual-supply translating transceiver with independent VCC(A) and VCC(B) rails (1.1 V to 3.6 V), enabling bidirectional level translation between mismatched logic domains (e.g., 1.8 V ↔ 3.3 V). It features Schmitt-trigger inputs for noise immunity, IOFF circuitry for partial power-down, and operates across –40 °C to +125 °C. Used in low-power I²C, GPIO, and mixed-voltage interface applications.
For engineers reviewing the 74AUP1T45GW,125 datasheet, 74AUP1T45GW,125 pinout, 74AUP1T45GW,125 application, or 74AUP1T45GW,125 equivalent, this page delivers verified functional behavior, validated pin-level roles, real-world voltage translation constraints, and design-critical timing under varying supply combinations and temperature extremes.
Technical Context
The device implements a direction-controlled bidirectional data path where DIR referenced to VCC(A) selects A→B (DIR = HIGH) or B→A (DIR = LOW); A port is referenced to VCC(A), B port to VCC(B). Both supplies operate independently within 1.1 V–3.6 V, supporting interoperability across JEDEC-standard voltage nodes (1.2 V, 1.5 V, 1.8 V, 2.5 V, 3.3 V).
Schmitt-trigger inputs ensure robust operation with slow-rising signals across full VCC ranges. The IOFF circuit disables outputs and limits backflow current when either VCC(A) or VCC(B) is at GND, placing both A and B in high-impedance OFF-state during suspend mode - critical for hot-swap and power-gating designs.
Key Specifications
| Parameter | Value and Actual Design Meaning |
|---|---|
| VCC(A) Range | 1.1 V to 3.6 V - enables interface with 1.2 V/1.5 V/1.8 V logic domains |
| VCC(B) Range | 1.1 V to 3.6 V - supports translation to 2.5 V/3.3 V systems without level-shifter ICs |
| ICC (max) | 1.4 μA at –40 °C to +125 °C - ensures ultra-low static power in battery-backed subsystems |
| tpd (A↔B) | 1.7 ns to 31.2 ns depending on VCC pair and load - sub-10 ns typical at 3.3 V/3.3 V, CL = 5 pF |
| IOFF Leakage | ±0.75 μA max per port when one supply is 0 V - prevents damaging back-current during power sequencing |
| ESD Rating | HBM >5000 V, CDM >1000 V - meets industrial-grade robustness requirements without external protection |
| Operating Temp | –40 °C to +125 °C - qualified for automotive under-hood and industrial control environments |
Pinout & Package
TSSOP6 (SOT363-2) package: 6-pin plastic thin shrink small outline, 1.25 mm body width, lead pitch 0.5 mm, exposed pad not present.
| Pin/Terminal | Circuit Role | Design Meaning |
|---|---|---|
| 1 | VCC(A) | Supply reference for DIR input and A-port I/O - defines logic thresholds for A-side signals |
| 2 | GND | Common ground reference for both supply domains and signal integrity |
| 3 | A | Bidirectional data terminal referenced to VCC(A); functions as input or output based on DIR state |
| 4 | B | Bidirectional data terminal referenced to VCC(B); mirrors A's directionality under DIR control |
| 5 | DIR | Direction control input referenced to VCC(A); HIGH = A→B, LOW = B→A |
| 6 | VCC(B) | Supply reference for B-port I/O - sets output swing and input thresholds on B side |
Key Features
| Feature | Design Value |
|---|---|
| Dual independent supply rails | Enables seamless 1.2 V ↔ 3.3 V translation without external biasing or resistors |
| IOFF partial power-down | Prevents backflow current when either VCC is powered off - essential for dynamic power management |
| Schmitt-trigger inputs | Guarantees clean switching with slow-edge signals (e.g., RC-filtered GPIO, long traces) |
| High noise immunity | Input hysteresis ≥0.4 × VCC minimizes false triggering in electrically noisy industrial environments |
| Ultra-low ICC | Sub-μA quiescent current extends battery life in always-on sensor nodes and wearables |
Applications
| Industrial Sensor Interface | I²C Bus Voltage Translation |
|---|---|
Use Scenario: Connecting a 1.8 V MEMS pressure sensor to a 3.3 V microcontroller ADC subsystem via GPIO lines. IC Role / Device Role / Timing Role: Bidirectional level translator isolating supply domains while preserving signal integrity and timing alignment. Use Value: Eliminates need for discrete FET-based translators; maintains <10 ns propagation delay at 1.8 V/3.3 V, CL = 5 pF. | Use Scenario: Interfacing a 1.2 V EEPROM to a 2.5 V host controller on shared I²C SDA/SCL lines. IC Role / Device Role / Timing Role: Translates pull-up-dependent open-drain signals bidirectionally without compromising bus timing or rise/fall symmetry. Use Value: Schmitt-trigger inputs tolerate slow-rising edges from weak pull-ups; IOFF prevents leakage when EEPROM is powered down. |
| Automotive Body Control Module | Low-Power Wearable Subsystem |
Use Scenario: Bridging a 3.3 V CAN transceiver status pin to a 1.5 V MCU GPIO in an under-dash control unit. IC Role / Device Role / Timing Role: Direction-controlled signal isolator ensuring safe voltage domain crossing during ignition cycling. Use Value: Suspend mode forces high-Z on both ports when VCC(A) drops - avoids contention during cold-start power ramp. | Use Scenario: Enabling bidirectional communication between a 1.1 V ultra-low-power PMIC and a 1.8 V BLE SoC in a hearable device. IC Role / Device Role / Timing Role: Minimal-footprint voltage translator supporting sub-1 μA system sleep current. Use Value: ICC ≤ 1.4 μA over full temperature range ensures no measurable impact on 7-day battery runtime. |
Equivalent & Alternatives
The following parts are listed as comparable options for similar bidirectional level translation applications.
| Alternative Part | Technical Difference | Application Difference | Selection Advice |
|---|---|---|---|
| SN74LVC1T45DBVR | Single-supply (VCC only); requires external pull-ups for open-drain compatibility; no IOFF | Lacks true dual-supply independence and suspend-mode isolation - unsuitable for asymmetric power sequencing | Select only if both sides share same VCC and system lacks hot-swap requirements |
| TXS0102DCUR | Auto-direction sensing (no DIR pin); higher ICC (10 μA typ); supports 1.2 V to 3.6 V but no Schmitt inputs | Eliminates DIR control overhead but introduces timing uncertainty on bus turnaround; less noise-tolerant | Prefer when bus protocol guarantees clean idle states and EMI is low |
Compared with SN74LVC1T45DBVR and TXS0102DCUR, the 74AUP1T45GW,125 uniquely combines independent dual-supply operation, guaranteed IOFF shutdown, Schmitt-trigger noise immunity, and sub-μA ICC - making it the only choice for robust, low-power, mixed-voltage GPIO bridging with strict power sequencing constraints.
Availability
74AUP1T45GW,125 is available at Aetrix Electronics and suitable for industrial sensor interfaces, automotive body control modules, I²C voltage translation, and low-power wearable subsystems requiring stable component supply across extended temperature ranges and long production lifecycles.
Supply support for 74AUP1T45GW,125 includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.
Manufacturer
Nexperia is a global semiconductor expert focused on high-volume, high-reliability logic, analog, and MOSFET solutions, with leadership in automotive-qualified and energy-efficient components.
The 74AUP (Advanced Ultra-low Power) product line targets battery-powered and thermally constrained applications requiring nanowatt static power, wide supply flexibility, and robust operation across –40 °C to +125 °C.
FAQ
Can 74AUP1T45GW,125 translate between 1.1 V and 3.6 V simultaneously?
Yes - VCC(A) and VCC(B) may be set independently within 1.1 V to 3.6 V. When VCC(A) = 1.1 V and VCC(B) = 3.6 V, the device translates signals bidirectionally with VIH/VIL thresholds scaled to each rail. Propagation delay increases to ~31 ns (CL = 5 pF), but functionality remains fully specified per datasheet Table 8.
What happens to A and B pins when VCC(A) = 0 V and VCC(B) = 3.3 V?
In that condition, the IOFF circuit activates: both A and B enter high-impedance OFF-state, and leakage is limited to ±0.75 μA maximum. This prevents back-driving the 3.3 V domain from the unpowered 1.1 V side - a key requirement for safe power sequencing in multi-rail systems.
Does the DIR pin require a pull-up or pull-down resistor?
No - DIR has defined logic thresholds referenced to VCC(A): VIH ≥ 0.7 × VCC(A), VIL ≤ 0.3 × VCC(A). Driving DIR directly from a compatible GPIO (e.g., 1.8 V MCU controlling 1.8 V/3.3 V translation) eliminates external components and ensures deterministic direction control.
Is the TSSOP6 package (SOT363-2) RoHS and REACH compliant?
Yes - 74AUP1T45GW,125 is manufactured in Nexperia's ISO 9001-certified facilities and complies with RoHS Directive 2011/65/EU and REACH Regulation (EC) No. 1907/2006, including SVHC screening. Full compliance documentation is available upon request from Aetrix Electronics.
74AUP1T45GW,125 Specifications
- Product attributes
- Attribute value
- Manufacturer:
- Nexperia USA Inc.
- Series:
- 74AUP
- Package/Case:
- Packaging:
- Tape & Reel (TR)
- Product Status:
- Active
- Translator Type:
- -
- Channel Type:
- -
- Number of Circuits:
- -
- Channels per Circuit:
- -
- Voltage - VCCA:
- -
- Voltage - VCCB:
- -
- Input Signal:
- -
- Output Signal:
- -
- Output Type:
- 3-State
- Data Rate:
- -
- Operating Temperature:
- -40°C ~ 125°C (TA)
- Grade:
- -
- Qualification:
- -
- Features:
- -
- Mounting Type:
- Surface Mount
- Supplier Device Package:
- 6-TSSOP, SC-88, SOT-363
74AUP1T45GW,125 FAQ
1.How can I place an order for 74AUP1T45GW,125 through Aetrix?
Please submit a Request for Quotation (RFQ) for 74AUP1T45GW,125 on Aetrix. Our sales agent will provide a competitive quotation and guide you through the order confirmation once you accept the terms.
2.Are the price and stock information for 74AUP1T45GW,125 reliable?
The price and inventory of 74AUP1T45GW,125 are updated periodically and may fluctuate due to market conditions. Stock and pricing data are typically refreshed every 24 hours. Quotation validity for 74AUP1T45GW,125 is usually 5 days.
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74AUP1T45GW,125 orders can be shipped via leading logistics carriers, including DHL, UPS, FedEx, TNT, or Registered Mail.
Once your 74AUP1T45GW,125 order is processed, you will receive an email with the shipment details and tracking number.
Note: Tracking information may take up to 24 hours to appear. Express delivery typically takes 3–5 business days.
5.How can I obtain technical support or documentation for 74AUP1T45GW,125?
For technical support, including 74AUP1T45GW,125 datasheets, pinout diagrams, or application guidance, please contact our engineering support team. They can provide detailed documentation and assistance for your 74AUP1T45GW,125 requirements.
6.How does Aetrix verify that 74AUP1T45GW,125 is sourced from the original manufacturer or authorized distributors?
All 74AUP1T45GW,125 products on Aetrix are procured from qualified distributors and authorized channels. Our dedicated quality assurance team conducts strict verification, including traceability checks and, if necessary, third-party testing. This ensures that 74AUP1T45GW,125 meets industry standards.
7.What is the process for return or replacement of 74AUP1T45GW,125?
All 74AUP1T45GW,125 units undergo pre-shipment inspection (PSI). If there is an issue with 74AUP1T45GW,125, returns or replacements are accepted under the following conditions:
1.Quantity discrepancies, incorrect items, or visible external defects (such as breakage or corrosion), acknowledged by Aetrix.
2.The issue is reported within 90 days of delivery.
3.The 74AUP1T45GW,125 part is unused and in its original packaging.
Return procedure for 74AUP1T45GW,125:
1.Submit a request within 90 days.
2.Obtain a Return Material Authorization (RMA) from Aetrix.
74AUP1T45GW,125 Tags

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74LVC1T45GW,125
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