Nexperia USA Inc. 74AUP1T86GXH

Overview

74AUP1T86GXH from Nexperia is a single 2-input EXCLUSIVE-OR gate with integrated voltage-level translation, operating from 2.3 V to 3.6 V supply while accepting 1.8 V CMOS input levels. It delivers ultra-low static current (≤1.5 μA), Schmitt-trigger inputs for noise immunity, and IOFF circuitry enabling partial power-down mode. It serves in battery-powered sensor interfaces where logic-level bridging between 1.8 V controllers and 2.5/3.3 V peripherals is required.

For engineers reviewing the 74AUP1T86GXH datasheet, 74AUP1T86GXH pinout, 74AUP1T86GXH application, or 74AUP1T86GXH equivalent, key selection criteria include its dual-voltage input tolerance (up to 3.6 V), hysteresis-enabled robustness against slow-rising signals, guaranteed operation down to -40 °C and up to +125 °C, and X2SON5 package suitability for space-constrained portable designs.

Technical Context

This device implements a single XOR function using advanced AUP (Advanced Ultra Low Power) CMOS technology. Its Schmitt-trigger inputs provide ≥0.15 V hysteresis across full VCC range (2.3–3.6 V), ensuring reliable switching despite slow or noisy input edges. The IOFF feature actively disables output drivers during power-down, blocking backflow current when VCC = 0 V.

The logic is fully specified for mixed-voltage systems: inputs tolerate 0–3.6 V independent of VCC, enabling direct connection to 1.8 V, 2.5 V, or 3.3 V sources, while outputs swing rail-to-rail (VOL ≤ 0.50 V at 4 mA, VOH ≥ 2.30 V at –4 mA) under all valid supply conditions.

Key Specifications

Pinout & Package

X2SON5 (SOT1226-3) package: 0.8 mm × 0.8 mm × 0.32 mm, thermally enhanced, leadless, 5-terminal surface-mount package with exposed die pad for improved thermal dissipation.

Key Features

Applications

Equivalent & Alternatives

The following parts are listed as comparable options for similar XOR gate with level translation applications.

Compared with SN74LVC1G86DBVR and 74LVC1G97GW, the 74AUP1T86GXH uniquely combines Schmitt-trigger noise immunity, IOFF protection, and sub-2 μA ICC - making it optimal for ultra-low-power, mixed-voltage, and noise-prone embedded interfaces.

Availability

74AUP1T86GXH is available at Aetrix Electronics and suitable for IoT sensor nodes, portable medical devices, industrial battery monitors, and automotive cabin control panels requiring stable component supply across extended temperature and voltage ranges.

Supply support for 74AUP1T86GXH includes scheduled delivery planning, volume procurement assistance, BOM continuity management, traceable sourcing, and lifecycle availability coordination for OEM customers, industrial embedded developers, connected-device designers, and electronics production programs.

Manufacturer

Nexperia is a leading semiconductor manufacturer specializing in high-performance, energy-efficient logic, analog, and discrete components for automotive, industrial, and consumer markets.

The 74AUP1T86GXH belongs to the Advanced Ultra Low Power (AUP) logic family, designed specifically for battery-operated and thermally constrained applications demanding minimal quiescent current and robust signal integrity.

FAQ

What is the maximum input voltage the 74AUP1T86GXH can tolerate?

The 74AUP1T86GXH accepts input voltages from 0 V to 3.6 V regardless of supply voltage - enabling direct interface with 1.8 V, 2.5 V, or 3.3 V sources without external clamping. This specification is guaranteed across the full operating temperature range (–40 °C to +125 °C) and is validated per absolute maximum ratings in Table 5 of the datasheet.

Does the 74AUP1T86GXH support true bidirectional level translation?

No - the 74AUP1T86GXH is unidirectional: inputs accept wide-voltage signals (0–3.6 V), but the output swings only between GND and VCC (2.3–3.6 V). It performs voltage-level translation only from low-voltage inputs to higher-supply outputs. For true bidirectional translation, a dedicated bus switch or auto-direction-sensing transceiver is required.

How does the IOFF feature behave during system power sequencing?

When VCC drops below ~0.2 V, the IOFF circuit automatically disables both output drivers, limiting leakage to ±0.75 μA. This prevents current backflow from powered sections (e.g., 3.3 V domain) into the unpowered IC, protecting upstream drivers and avoiding unintended logic states during staggered power-up/down sequences in modular systems.

Can the 74AUP1T86GXH drive a 50 pF load reliably?

Yes - although typical propagation delay increases to ~11.9 ns (VCC = 2.3 V, CL = 30 pF), the device maintains valid VOL/VOH levels (≤0.50 V / ≥2.30 V) and remains functional at 50 pF. However, for timing-critical paths, design margin should account for increased delay and potential signal integrity effects; layout best practices (short traces, ground plane) are recommended.